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STM32F769AI 数据表(PDF) 180 Page - STMicroelectronics

部件名 STM32F769AI
功能描述  Dual mode Quad-SPI
PDF  255 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32F769AI 数据表(HTML) 180 Page - STMicroelectronics

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DocID029041 Rev 4
SPI interface characteristics
Unless otherwise specified, the parameters given in Table 85 for the SPI interface are
derived from tests performed under the ambient temperature, fPCLKx frequency and VDD
supply voltage conditions summarized in Table 17, with the following configuration:
Output speed is set to OSPEEDRy[1:0] = 11
Capacitive load C = 30 pF
Measurement points are done at CMOS levels: 0.5VDD
Refer to Section 5.3.20: I/O port characteristics for more details on the input/output alternate
function characteristics (NSS, SCK, MOSI, MISO for SPI).
Table 85. SPI dynamic characteristics(1)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fSCK
1/tc(SCK)
SPI clock frequency
Master mode
SPI1,4,5,6
2.7≤VDD≤3.6
--
54(2)
MHz
Master mode
SPI1,4,5,6
1.71≤VDD≤3.6
27
Master transmitter mode
SPI1,4,5,6
1.71≤VDD≤3.6
54
Slave receiver mode
SPI1,4,5,6
1.71≤VDD≤3.6
54
Slave mode transmitter/full
duplex
SPI1,4,5,6
2.7≤VDD≤3.6
50(3)
Slave mode transmitter/full
duplex
SPI1,4,5,6
1.71≤VDD≤3.6
37(3)
Master & Slave mode
SPI2,3
1.71≤VDD≤3.6
27
tsu(NSS)
NSS setup time
Slave mode, SPI presc = 2
4*TPLCK
--
ns
th(NSS)
NSS hold time
Slave mode, SPI presc = 2
2*TPLCK
--
tw(SCKH)
tw(SCKL)
SCK high and low time
Master mode
TPLCK - 2
TPLCK
TPLCK + 2



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