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STM32F769AI 数据表(PDF) 188 Page - STMicroelectronics |
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STM32F769AI 数据表(HTML) 188 Page - STMicroelectronics |
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188 / 255 page  Electrical characteristics STM32F765xx STM32F767xx STM32F768Ax STM32F769xx 188/255 DocID029041 Rev 4 Figure 53. SAI master timing waveforms tv(SD_B_ST) Data output valid time Slave transmitter (after enable edge) 2.7≤VDD≤3.6V -12 ns Slave transmitter (after enable edge) 1.71≤VDD≤3.6V -20 th(SD_B_MT) Data output hold time Slave transmitter (after enable edge) 5 - tv(SD_MT)_A Data output valid time Master transmitter (after enable edge) 2.7≤VDD≤3.6V -15 Master transmitter (after enable edge) 1.71≤VDD≤3.6V -20 th(SD_A_MT) Data output hold time Master transmitter (after enable edge) 5 - 1. Guaranteed by characterization results. 2. APB clock frequency must be at least twice SAI clock frequency. 3. With FS=192kHz. Table 89. SAI characteristics(1) (continued) Symbol Parameter Conditions Min Max Unit |
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