STM32F769AI datasheet(185/255 Pages) STMICROELECTRONICS

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STM32F765xx STM32F767xx STM32F768Ax STM32F769xx

Electrical characteristics

224

JATG/SWD characteristics

Unless otherwise specified, the parameters given in Table 87 for JTAG/SWD are derived

from tests performed under the ambient temperature, fHCLK frequency and VDD supply

voltage conditions summarized in Table 17, with the following configuration:

•

Output speed is set to OSPEEDRy[1:0] = 10

•

Capacitive load C=30 pF

•

Measurement points are performed at CMOS levels: 0.5VDD

Refer to Section 5.3.20: I/O port characteristics for more details on the input/output alternate

function characteristics (SCK,SD,WS).

Table 87. Dynamics characteristics: JTAG characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Fpp

TCK clock frequency

2.7V <VDD< 3.6V

MHz

1/tc(TCK)

1.71 <VDD< 3.6V

tw(TCKH)

SCK high and low time

TPCLK − 1TPCLK

TPCLK + 1

tw(TCKL)

tsu(TMS)

TMS input setup time

th(TMS)

TMS input hold time

tsu(TDI)

TDI input setup time

0.5

th(TDI)

TDI input hold time

tov (TDO)

TDO output valid time

2.7V <VDD< 3.6V

1.71 <VDD< 3.6V

-9

toh(TDO)

TDO output hold time

7.5

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