STM32F769AI datasheet(187/255 Pages) STMICROELECTRONICS

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STM32F765xx STM32F767xx STM32F768Ax STM32F769xx

Electrical characteristics

224

Figure 52. SWD timing diagram

SAI characteristics:

Unless otherwise specified, the parameters given in Table 89 for SAI are derived from tests

performed under the ambient temperature, fPCLKx frequency and VDD supply voltage

conditions summarized in Table 17, with the following configuration:

•

Output speed is set to OSPEEDRy[1:0] = 10

•

Capacitive load C=30 pF

•

Measurement points are performed at CMOS levels: 0.5VDD

Refer to Section 5.3.20: I/O port characteristics for more details on the input/output alternate

function characteristics (SCK,SD,WS).

Table 89. SAI characteristics(1)

Symbol

Parameter

Conditions

Min

Max

Unit

fMCK

SAI Main clock output

256 x 8K

256xFs

MHz

FCK

SAI clock frequency(2)

Master data: 32 bits

128xFs(3)

MHz

Slave data: 32 bits

128xFs

tv(FS)

FS valid time

Master mode

2.7≤VDD≤3.6V

-15

Master mode

1.71≤VDD≤3.6V

-20

tsu(FS)

FS setup time

Slave mode

th(FS)

FS hold time

Master mode

Slave mode

tsu(SD_A_MR)

Data input setup time

Master receiver

tsu(SD_B_SR)

Slave receiver

3.5

th(SD_A_MR)

Data input hold time

Master receiver

th(SD_B_SR)

Slave receiver

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