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ST6380 数据表(PDF) 74 Page - STMicroelectronics |
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ST6380 数据表(HTML) 74 Page - STMicroelectronics |
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74 / 82 page  74/82 ST63E88,ST63T88, ST63E89,ST63T89 1 GENERAL DESCRIPTION Table 28. Device Summary Figure 35. . Block Diagram Device EPROM (Bytes) OTP (Bytes) RAM (Bytes) EEPROM (Bytes) ADC VS D/A Colour Pins Target R0M Devices ST63E88 20K 256 384 Yes Yes 6 3 ST6380, 82, 88 ST63T88 20K 256 384 Yes Yes 6 3 ST6380, 82, 88 ST63T89 20K 256 384 Yes Yes 4 3 ST6381, 83, 89 ST63T89 20K 256 384 Yes Yes 4 3 ST6381, 83, 89 TEST IRIN/PC6 INTERRUPT UP TO 20KBytes PC STACK LEVEL 1 STACK LEVEL 2 STACK LEVEL 3 STACK LEVEL 4 STACK LEVEL 5 STACK LEVEL 6 POWER SUPPLY OSCILLATOR RESET DATA ROM USER SELECTABLE DATA RAM 256 Bytes PORT A PORT C 8 BIT CORE TEST TIMER 1 PA0 - PA7* VDD VSS OSCin OSCout RESET USER PROGRAM MEMORY TIMER 2 Inputs DATA EEPROM 384 Bytes PC2, PC4 - PC7* D/A Outputs VS* R, G, B, BLANK VS Output On-Screen Digital Watchdog DA0 - DA5 *Refer to Pin Description for Additional Information Serial Peripheral PC0/SCL PC1/SDA PC3/SEN Timer Display Interface HSYNC, VSYNC VR01753 OSDOSCout OSDOSCin PB0 - PB6* PORT B & A/D inputs |
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