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ST6380 数据表(PDF) 48 Page - STMicroelectronics |
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ST6380 数据表(HTML) 48 Page - STMicroelectronics |
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48 / 82 page ![]() 48/82 ST6380, ST6381, ST6382, ST6383, ST6388, ST6389 4.7 DEDICATED LATCHES Two latches are available which may generate in- terrupts to the ST638x core. The IR latch is set ei- ther by the falling or rising edge of the signal on pin PC6(IRIN). If bit 1 (IRPOSEDGE) of the latches register (E9h) is high, then the latch will be trig- gered on the rising edge of the signal at PC6(IRIN). If bit 1 (IRPOSEDGE) is low, then the latch will be triggered on the falling edge of the sig- nal at PC6(IRIN). The IR latch can be reset by set- ting bit 3 (RESIRLAT) of the latches register; the bit is write only and a high should be written every time the IR latch needs to be reset. If bit 2 (IRINT- EN) of the latches register (E9h) is high, then the output of the IR latch, IRINTN, may generate an in- terrupt (#0). IRINTN is inverted with respect to the state of the IR latch. If bit 2 (IRINTEN) is low, then the output of the IR latch, IRINTN, is forced high.The state of the IR latch may be read from bit 3 (IRLATCH) of register E4h; if the IR latch is set, then bit 3 will be high. The PWR latch is set either by the falling or rising edge of the signal on pin PC4(PWRIN). If bit 4 (PWREDGE) of the latches register (E9h) is high, then the latch will be trig- gered on the rising edge of the signal at PC4(PWRIN). If bit 4 (PWREDGE) is low, then the latch will be triggered on the falling edge of the sig- nal at PC4(PWRIN). The PWR latch can be reset by setting bit 6 (RESPWRLAT) of the latches reg- ister; the bit is set only and a high should be written every time the PWR latch needs to be reset. If bit 5 (PWRINTEN) of the latches register (E9h) is high, then the output of the PWR latch, PWRINTN, may generate an interrupt (#4). PWRINTN is inverted with respect to the state of the PWR latch. If bit 5 (PWRINTEN) is low, then the output of the PWR latch, PWRINTN, is forced high. Dedicated Latches Control Register (DLCR) Address: E9h - Write only Reset Value: XXh Caution: This register contains at least one write only bit. Single bit instructions (SET, RES, INC and DEC) should not be used. Bit 7. This bit is not used RESPWRLAT. Resets the PWR latch; this bit is write only. PWRINTEN. This bit enables the PWRINT signal (#4) from the latch to the ST638x core. Undefined after reset. PWREDGE. The bit determines the edge which will cause the PWRIN latch to be set. If this bit is high, than the PWRIN latch will be set on the rising edge of the PWRIN signal. Undefined after reset. RESIRLAT. Resets the IR latch; this bit is write on- ly. Undefined after Reset. IRINTEN. This bit enables the IRINTN signal (#0) from the latch to the ST638x core. Undefined after reset. IRPOSEDGE. The bit determines the edge which will cause the IR latch to be set. If this bit is high, than the IR latch will be set on the rising edge of the IR signal. Undefined after reset. Bit 0. This bit is not used 70 - RESP- WRLAT PWRINT- EN PWRED GE RESIR- LAT IRINT- EN IR- POSED GE - |
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