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ST6380 数据表(PDF) 28 Page - STMicroelectronics |
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ST6380 数据表(HTML) 28 Page - STMicroelectronics |
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28 / 82 page ![]() 28/82 ST6380, ST6381, ST6382, ST6383, ST6388, ST6389 4 ON-CHIP PERIPHERALS 4.1 I/O PORTS The ST638x microcontrollers use three standard I/ O ports (A,B,C) with up to eight pins on each port; refer to the device pin configurations to see which pins are available. Each line can be individually programmed either in the input mode or the output mode as follows by software. – Output – Input with on-chip pull-up resistor (selected by software) – Input without on-chip pull-up resistor (selected by software) – Analog inputs (PB0-PB6) Note: pins with 12V open-drain capability do not have pull-up resistors. In output mode the following hardware configura- tions are available: – Open-drain output 12V (PA4-PA7, PC4-PC7) – Open-drain output 5V (PC0-PC3, PB0-PB6) – Push-pull output (PA0-PA3, PB0-PB6) The lines are organized in three ports (port A,B,C). The ports occupy 7 registers in the data space. Each bit of these registers is associated with a par- ticular line (for instance, the bits 0 of the Port A Data and Direction registers are associated with the PA0 line of Port A). There are three Data registers (DRA, DRB, DRC), that are used to read the voltage level values of the lines programmed in the input mode, or to write the logic value of the signal to be output on the lines con- figured in the output mode. The port Data Registers can be read to get the effective logic levels of the pins, but they can be also written by the user soft- ware, in conjunction with the related Data Direction Register and the Option Register (Port B only), to select the different input mode options. Single-bit operations on I/O registers (bit set/reset instruc- tions) are possible but care is necessary because reading in input mode is made from I/O pins and therefore might be influenced by the external load, while writing will directly affect the Port data register causing an undesired changes of the input config- uration. The three Data Direction registers (DDRA, DDRB, DDRC) allow the selection of the direction of each pin (input or output). All the I/O registers can be read or written as any other RAM location of the data space, so no extra RAM cell is needed for port data storing and ma- nipulation. During the initialization of the MCU, all the I/O registers are cleared and the input mode with pull-up is selected on all the pins thus avoiding pin conflicts (with the exception of PC2 that is set in out- put mode and is set high i.e. high impedance). |
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