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TNETX3150 数据表(PDF) 64 Page - Texas Instruments |
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TNETX3150 数据表(HTML) 64 Page - Texas Instruments |
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64 / 78 page ![]() TNETX15AE ADDRESS-LOOKUP DEVICE SPWS041A – AUGUST 1997 – REVISED OCTOBER 1997 64 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 absolute maximum ratings over operating case temperature range (unless otherwise noted)† Supply voltage range, VCC (see Notes 2 and 3) –0.5 V to 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supply voltage range, VCC(5V) (see Notes 2 and 3) –0.5 V to 5.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input voltage range, VI –0.5 V to VCC(5 V) + 0.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output voltage range, VO –0.5 V to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal impedance, junction-to-ambient package, airflow = 0, ZθJA 47.5 °C/W . . . . . . . . . . . . . . . . . . . . . . . . . Thermal impedance, junction-to-ambient package, airflow = 100 ft/min, ZθJA 38.2 °C/W . . . . . . . . . . . . . . . . . Thermal impedance, junction-to-case package, ZθJC 9.9 °C/W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating case temperature range, TC 0 °C to 95°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage temperature range, Tstg –65 °C to 150°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . † Stresses beyond those listed under “absolute maximum ratings” can cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods can affect device reliability. NOTES: 2. All voltage values are with respect to GND. 3. Turning power supplies on and off (cycling sequence) within a mixed 5-V/3.3-V system is an important consideration. The designer must observe a few rules to avoid damaging the TNETX15AE. Check with the manufacturers of all components used in the 3.3-V to 5-V interface to ensure that no unique device characteristics exist that would lead to rules more restrictive than the TNETX15AE requires. The optimum solution to power-supply sequencing in a mixed-voltage system is to ramp up the 3.3-V supply first. A power-on reset component operating from this supply forces all 5-V tolerant outputs into the high-impedance state. Then, the 5-V supply is ramped up. On power down, the 5-V rail deenergizes first, followed by the 3.3-V rail. The second-best solution is to ramp both the 3.3-V and 5-V rails at the same time, making sure that no more than 3.6 V exists between these two rails during the ramp up or down. If the 3.3 V is derived from the 5 V, then the 3.3 V rises as the 5 V rises so that the 5-V rail never exceeds the 3.3-V rail by more than 3.6 V. Both the optimum and second-choice algorithms for power up prevent any device damage. If it is impractical to implement ramping, follow these rules: • When turning on the power supply, all 3.3-V and 5-V supplies should start ramping from 0 V and reach 95 percent of their end-point values within 25 ms. All bus contention between the device and external devices is eliminated by the end of 25 ms. • When turning off the power supply, 3.5-V and 5-V supplies should start ramping from steady-state values and reach 5 percent of these values within 25 ms. All bus contention between the device and external devices is eliminated by the end of 25 ms. There is a 250-second lifetime maximum at greater than 3.6 V between the supply rails. Holding this period to 25 ms per power-on/off cycle should not significantly contribute to shifts in mean time between failures (MTBF) during product lifetimes. recommended operating conditions MIN NOM MAX UNIT VCC Supply voltage 3 3.3 3.6 V VCC(5V) Supply voltage 4.5 5 5.5 V VIH High-level input voltage 2 VCC(5V) V VIL Low-level input voltage (see Note 4) 0 0.8 V IOH High-level output current –4 mA IOL Low-level output current 4 mA NOTE 4: The algebraic convention, where the more-negative (less-positive) limit is designated as a minimum, is used for logic-voltage levels only. |
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