TNETX3150 datasheet(26/78 Pages) TI

26 / 78 page

TNETX15AE

ADDRESS-LOOKUP DEVICE

SPWS041A – AUGUST 1997 – REVISED OCTOBER 1997

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

manufacturing test register, MANtest at 0x23 (DIO)

This register is reserved for Texas Instruments (TI

™) manufacturing test. It is written to 0x0 for normal operation.

All reset mechanisms leave 0x0 in this register, and it is not loaded from the EEPROM. It is written to only when

the START bit is 0.

It contains mechanisms, for example, that increment all the counters at the same time (or run the aging algorithm

quicker than usual to decrease the time required to test the part at manufacture). Setting any of these bits results

in abnormal operation. To allow improvement to the testing, these functions are subject to change.

SRAM data register, RAMdata at 0x24–0x25 (DIO)

BYTE 1

BYTE 0

BIT

RAMdata after reset

Data at SRAM (0x000000)

The RAMdata register is used to access the SRAM address held in the RAM ADD field of the RAMaddr register.

This field is 16-bits wide.

D Writes to the RAM are executed when the MS byte of the RAMdata register is written to by the host. When

depositing values for transfer to SRAM, write the least-significant byte first.

D Reads are accomplished by reading the data from either byte in the RAMdata register.

D The SRAM address to be accessed should be placed in the RAMaddr register. If the INC bit in the RAMaddr

accessed.

TNETX3150 数据表(PDF) 26 Page - Texas Instruments