TNETX3150 datasheet(10/78 Pages) TI

10 / 78 page

TNETX15AE

ADDRESS-LOOKUP DEVICE

SPWS041A – AUGUST 1997 – REVISED OCTOBER 1997

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

Terminal Functions (Continued)

DIO interface-EEPROM

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

ECLK

115

EEPROM clock. ECLK is the serial EEPROM data clock and is implemented as a 3.3-V totem-pole output cell.

Because of the active pullup, and since most EEPROMs use CMOS logic levels, it may be difficult to use 5-V

EEPROMs.

EDIO

110

I/O

EEPROM data input/output. EDIO is the serial EEPROM data I/O signal. This terminal requires an external pullup

(see EEPROM data sheet) for EEPROM operation.

control logic interface

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

OSCIN

Oscillator input. OSCIN is the clock input that drives the internal state machines. For no-glue interface to the

TNETX3150/TNETX3150A/TNETX3100, OSCIN is connected to the TNETX3150/TNETX3150A/TNETX3100

OSCIN terminal.

RESET

108

Reset. RESET (active low) resets the TNETX15AE. RESET must remain active for at least 25 ms after power

and the clocks have stabilized on power up. After the power-up cycle, RESET must remain active for a minimum

of 3

µs for recognition.

JTAG interface

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

TCLK

140

Test clock. TCLK clocks state information and test data into and out of the device during operation of the test port.

TDI

139

Test data input. TDI serially shifts test data and test instructions into the device during operation of the test port.

TDO

144

Test data out. TDO serially shifts test data and test instructions out of the device during operation of the test port.

TMS

141

Test mode select. TMS controls the state of the test-port controller.

TRST

142

Test reset. TRST asynchronously resets the test-port controller when set low.

power interface

TERMINAL

DESCRIPTION

NAME

NO.

DESCRIPTION

GND

11, 25, 49, 68, 82,

100, 111, 129, 143

Ground. GND is the 0-V reference for the device.

VCC

4, 18, 39, 58, 77,

92, 107, 122, 135,

Supply voltage. VCC = 3.3 ± 0.3 V. VCC is the main-logic power supply.

VCC(5V)

30, 44, 63, 87,

116, 138

Supply voltage. VCC(5V) = 5 ± 0.5 V. VCC(5V) is the clamp rail voltage on I/O terminals that gives TTL

capability.

TNETX3150 数据表(PDF) 10 Page - Texas Instruments

TNETX3150 数据表(HTML) 10 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78

数据表下载

链接网址

TNETX3150 数据表(PDF) 10 Page - Texas Instruments

TNETX3150 数据表(HTML) 10 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78

数据表 下载

链接网址

数据表下载