TNETX3150 datasheet(15/78 Pages) TI

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TNETX15AE

ADDRESS-LOOKUP DEVICE

SPWS041A – AUGUST 1997 – REVISED OCTOBER 1997

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

EEPROM auto-configuration from an external x24C02 EEPROM (continued)

The organization of the EEPROM data is shown in Table 4. The last register loaded is the control register. This

allows a complete initialization by downloading the contents of the EEPROM into the TNETX15AE. During the

download, no DIO operations are permitted. The LOAD and RESET bits in the control register cannot be set

during a download, preventing a download loop.

The TNETX15AE has reserved space in the register map with corresponding reserved space in the EEPROM.

This is to support additional features in future revisions of the device with minimal impact on software drivers

written for this device. Although the TNETX15AE does not use the values in the reserved EEPROM locations

to load the reserved locations in the register map, the auto-loader reads every address from the beginning of

the EEPROM to the CRC to calculate the CRC. That is, changing a loaded value or a reserved value requires

a new CRC for the EEPROM.

The TNETX15AE detects the presence/absence of the EEPROM. If it is not installed, the EDIO terminal should

be tied low. For EEPROM operation, the terminal requires an external pullup (see EEPROM data sheet). When

no EEPROM is detected, the TNETX15AE assumes default register values at power up and is halted.

Downloading a configuration from the EEPROM terminals is disabled when no EEPROM is present.

The first bit written to or read from the EEPROM is the most-significant bit of the byte, i.e., data (7). Therefore,

writing the address 0xC0 is accomplished by writing a 1 and then 1, 0, 0, 0, 0, 0, 0. For details of reading, writing,

or programming a 24C02 device, refer to the device data sheet.

The TNETX15AE causes data to be stored in the EEPROM in a specific format. The range from 0x00 to 0x2A

in the EEPROM is reserved for use by the adapter. The contents of the remaining bytes are undefined. The

EEPROM can be read/written by driver software through the SIO register.

A 32-bit CRC value must be calculated from the EEPROM data and placed in the EEPROM in the location

following the bytes loaded into the internal registers. The TNETX15AE uses this 32-bit CRC to validate the

EEPROM data. If the CRC fails, the TNETX15AE registers are set to their default (hardwired) values. This is

the same state the TNETX15AE is in if no EEPROM is present. Without an EEPROM, a management CPU is

required to load all the registers and set the start bit to 1 in the upper one-half of the control/status register (0x08).

The CRC calculation on the EEPROM bytes is the same as the IEEE Std 802.3u for the packet CRC calculation

on a byte-by-byte basis. For reference, the equation is:

G(x)

+ x32 ) x26 ) x23 ) x22 ) x16 ) x12 ) x11 ) x10 ) x8 ) x7 ) x5 ) x4 ) x2 ) x ) 1

The TNETX15AE EEPROM register assignments are shown in Table 4.

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