MFC2000 datasheet(7/426 Pages) ETC

7 / 426 page

100723A

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vii

Figure 5-2. Power-down Select Logic .................................................................................................................................... 5-3

Figure 5-3. Power Reset Timing Diagram.............................................................................................................................. 5-5

Figure 5-4. +5v Prime Power Signal and VGG ...................................................................................................................... 5-6

Figure 5-5. Internal Power Detection ................................................................................................................................... 5-10

Figure 5-6. Figure Caption Required ................................................................................................................................... 5-10

Figure 5-7. Voltage Divider Circuit....................................................................................................................................... 5-11

Figure 5-8. Watchdog Timer Block Diagram........................................................................................................................ 5-12

Figure 5-9. Watchdog Time-Out Timing Diagram ................................................................................................................ 5-13

Figure 6-1. Fax Timing Control Logic Block Diagram ............................................................................................................ 6-2

Figure 6-2. MFC2000 Timing Chain ...................................................................................................................................... 6-3

Figure 6-3. Scan Control Timing............................................................................................................................................ 6-4

Figure 7-1. Video/Scanner Controller Block Diagram ............................................................................................................ 7-1

Figure 7-2. Untitled Timing Diagram .................................................................................................................................... 7-19

Figure 7-3. Untitled Timing Diagram .................................................................................................................................... 7-20

Figure 7-4. Untitled Timing Diagram .................................................................................................................................... 7-20

Figure 7-5. Untitled Timing Diagram .................................................................................................................................... 7-21

Figure 7-6. Untitled Timing Diagram .................................................................................................................................... 7-22

Figure 7-7. Untitled Timing Diagram .................................................................................................................................... 7-23

Figure 7-8. Untitled Timing Diagram .................................................................................................................................... 7-23

Figure 7-9. Untitled Timing Diagram .................................................................................................................................... 7-24

Figure 7-10. Untitled Timing Diagram .................................................................................................................................. 7-24

Figure 7-11. Untitled Timing Diagram .................................................................................................................................. 7-24

Figure 7-12. Untitled Timing Diagram .................................................................................................................................. 7-25

Figure 7-13. Untitled Timing Diagram .................................................................................................................................. 7-25

Figure 7-14. Untitled Timing Diagram .................................................................................................................................. 7-26

Figure 7-15. Untitled Timing Diagram .................................................................................................................................. 7-28

Figure 7-16. Untitled Timing Diagram .................................................................................................................................. 7-30

Figure 7-17. Untitled Timing Diagram .................................................................................................................................. 7-32

Figure 7-18. Untitled Timing Diagram .................................................................................................................................. 7-34

Figure 7-19. Untitled Timing Diagram .................................................................................................................................. 7-36

Figure 7-20. Untitled Timing Diagram .................................................................................................................................. 7-38

Figure 7-21. External circuit required for SONY–ILX516K interface .................................................................................... 7-40

Figure 7-22. LED timing for SONY–ILX516K....................................................................................................................... 7-40

Figure 7-23. Serial Programming Interface, Physical Connection ....................................................................................... 7-41

Figure 7-24. Bus Protocol .................................................................................................................................................... 7-42

Figure 7-25. Serial Programming Interface, Timing Diagram............................................................................................... 7-42

Figure 7-26. Stretching the Low Period of the Clock ........................................................................................................... 7-44

Figure 7-27. Firmware Operation

Transmission................................................................................................................ 7-48

Figure 7-28. Firmware Operation

Reception..................................................................................................................... 7-49

Figure 7-29. Connection to External Video Capture Device ................................................................................................ 7-51

Figure 7-30. Untitled Timing Diagram .................................................................................................................................. 7-54

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