数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

AD7687BCPZ-R2 数据表(PDF) 7 Page - Analog Devices

部件名 AD7687BCPZ-R2
功能描述  16-Bit, 1.5 LSB INL, 250 kSPS PulSAR Differential ADC in MSOP
PDF  27 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD7687BCPZ-R2 数据表(HTML) 7 Page - Analog Devices

Back Button AD7687BCPZ-R2 Datasheet HTML 3Page - Analog Devices AD7687BCPZ-R2 Datasheet HTML 4Page - Analog Devices AD7687BCPZ-R2 Datasheet HTML 5Page - Analog Devices AD7687BCPZ-R2 Datasheet HTML 6Page - Analog Devices AD7687BCPZ-R2 Datasheet HTML 7Page - Analog Devices AD7687BCPZ-R2 Datasheet HTML 8Page - Analog Devices AD7687BCPZ-R2 Datasheet HTML 9Page - Analog Devices AD7687BCPZ-R2 Datasheet HTML 10Page - Analog Devices AD7687BCPZ-R2 Datasheet HTML 11Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 27 page
background image
AD7687
Data Sheet
Rev. E | Page 6 of 26
TIMING SPECIFICATIONS
−40°C to +85°C, VDD = 4.5 V to 5.5 V, VIO = 2.3 V to 5.5 V or VDD + 0.3 V, whichever is the lowest, unless otherwise stated.
See Figure 2 and Figure 3 for load conditions.
Table 4.
Parameter
Symbol
Min
Typ
Max
Unit
CONVERSION TIME: CNV RISING EDGE TO DATA AVAILABLE
tCONV
0.5
2.2
µs
ACQUISITION TIME
tACQ
1.8
µs
TIME BETWEEN CONVERSIONS
tCYC
4
µs
CNV PULSE WIDTH (CS MODE)
tCNVH
10
ns
SCK PERIOD
tSCK
CS Mode
15
ns
Chain Mode
VIO Above 4.5 V
17
ns
VIO Above 3 V
18
ns
VIO Above 2.7 V
19
ns
VIO Above 2.3 V
20
ns
SCK TIME
Low
tSCKL
7
ns
High
tSCKH
7
ns
SCK FALLING EDGE
To Data Remains Valid
tHSDO
5
To Data Valid Delay
tDSDO
VIO Above 4.5 V
14
ns
VIO Above 3 V
15
ns
VIO Above 2.7 V
16
ns
VIO Above 2.3 V
17
ns
CNV OR SDI
Low to SDO D15 MSB Valid (CS Mode)
tEN
VIO Above 4.5 V
15
ns
VIO Above 2.7 V
18
ns
VIO Above 2.3 V
22
ns
High or Last SCK Falling Edge to SDO High Impedance (CS Mode)
tDIS
25
ns
SDI
Valid Setup Time from CNV Rising Edge (CS Mode)
tSSDICNV
15
ns
Valid Hold Time from CNV Rising Edge (CS Mode)
tHSDICNV
0
ns
Valid Setup Time from SCK Falling Edge (Chain Mode)
tSSDISCK
3
ns
Valid Hold Time from SCK Falling Edge (Chain Mode)
tHSDISCK
4
ns
High to SDO High (Chain Mode with BUSY indicator)
tDSDOSDI
VIO Above 4.5 V
15
ns
VIO Above 2.3 V
26
ns
SCK
Valid Setup Time from CNV Rising Edge (Chain Mode)
tSSCKCNV
5
ns
Valid Hold Time from CNV Rising Edge (Chain Mode)
tHSCKCNV
5
ns



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com