AD7687BCPZ-R2 datasheet(17/27 Pages) AD

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AD7687

Data Sheet

Rev. E | Page 16 of 26

ANALOG INPUT

Figure 27 shows an equivalent circuit of the input structure of

the AD7687.

The two diodes, D1 and D2, provide ESD protection for the

analog inputs IN+ and IN−. Take care to ensure that the analog

input signal never exceeds the supply rails by more than 0.3 V

because this causes these diodes to begin to forward-bias and

start conducting current. These diodes can handle a forward-

biased current of 130 mA maximum. These overvoltage

conditions can occur if the supplies of the input buffer (U1)

differ from VDD. In such a case, use an input buffer with a

short-circuit current limitation to protect the device.

CIN

RIN

CPIN

IN+

OR IN–

GND

VDD

Figure 27. Equivalent Analog Input Circuit

The analog input structure allows the sampling of the true

differential signal between IN+ and IN−. This differential input

scheme allows for rejection of common-mode signals. Figure 28

shows the typical CMRR over frequency.

FREQUENCY (kHz)

100

1000

VDD = 5V

VDD = 2.5V

Figure 28. Analog Input CMRR vs. Frequency

During the acquisition phase, the impedance of the analog

inputs (IN+ or IN−) can be modeled as a parallel combination

of capacitor, CPIN, and the network formed by the series connection

of RIN and CIN. CPIN is primarily the pin capacitance. RIN is

typically 3 kΩ and is a lumped component made up of some

serial resistors and the on resistance of the switches. CIN is

typically 30 pF and is mainly the ADC sampling capacitor.

During the conversion phase, where the switches are opened,

the input impedance is limited to CPIN. RIN and CIN make a

1-pole, low-pass filter that reduces undesirable aliasing effects

and limits the noise.

If the source impedance of the driving circuit is sufficiently low,

the AD7687 can be driven directly. Large source impedances

significantly affect the ac performance, especially the total

harmonic distortion (THD). The maximum source impedance

depends on the amount of THD that can be tolerated by the

AD7687. The THD degrades as a function of the source

impedance and the maximum input frequency, as shown in

Figure 29.

FREQUENCY (kHz)

–60

–70

–80

–90

–100

–110

–120

100

RS = 250Ω

RS = 100Ω

RS = 50Ω

RS = 33Ω

Figure 29. THD vs. Analog Input Frequency and Source Resistance

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