AD7687BCPZ-R2 datasheet(18/27 Pages) AD

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Data Sheet

AD7687

Rev. E | Page 17 of 26

DRIVER AMPLIFIER CHOICE

Although the AD7687 is easy to drive, consider the following

when selecting a driver amplifier.

The noise generated by the driver amplifier needs to be kept as low

as possible in order to preserve the SNR and transition noise

performance of the AD7687. The AD7687 has a noise much lower

than most of the other 16-bit ADCs and, therefore, can be driven

by a noisier op amp while preserving the same or better system

performance. The noise coming from the driver is filtered by the

AD7687 analog input circuit 1-pole, low-pass filter made by RIN

and CIN or by an external filter. Because the typical noise of the

AD7687 is 53 µV rms, the SNR degradation due to the amplifier is

(

) 















−

3dB

20log

LOSS

SNR

where:

f–3dB is either the input bandwidth in MHz of the AD7687 (2 MHz)

or the cutoff frequency of an external filter, if one is used.

N is the noise gain of the amplifier (for example, +1 in buffer

configuration).

eN is the equivalent input noise voltage of the op amp, in nV/√Hz.

For ac applications, ensure that the THD performance of the driver

is commensurate with the AD7687 and that the driver exceeds

the THD vs. frequency shown in Figure 16.

For multichannel multiplexed applications, the driver amplifier

and the AD7687 analog input circuit must settle a full-scale step

onto the capacitor array at a 16-bit level (0.0015%, 15 ppm). Settling

at 0.1% to 0.01% is more commonly specified in the amplifier

data sheet. This can differ significantly from the settling time at

a 16-bit level and must be verified prior to driver selection.

Table 10. Recommended Driver Amplifiers.

Amplifier

Typical Application

AD8021

Very low noise and high frequency

AD8022

Low noise and high frequency

AD8031

High frequency and low power

AD8519

Small, low power and low frequency

AD8605, AD8615

5 V single-supply, low power

AD8655

5 V single-supply, low noise

ADA4841-2

Very low noise, small, and low power

ADA4941-1

Very low noise, low power single-ended-to-

differential

OP184

Low power, low noise, and low frequency

SINGLE-TO-DIFFERENTIAL DRIVER

For applications using a single-ended analog signal, either bipolar

or unipolar, a single-ended-to-differential driver (like the one

shown in Figure 30) allows for a differential input into the part.

When provided a single-ended input signal, this configuration

produces a differential ±VREF with midscale at VREF/2.

10kΩ

590Ω

AD7687

IN+

IN–

REF

ANALOG INPUT

(±10V, ±5V, ..)

590Ω

10µF

100nF

10kΩ

VREF

590Ω

10kΩ

100nF

VREF

Figure 30. Single-Ended-to-Differential Driver Circuit

VOLTAGE REFERENCE INPUT

The AD7687 voltage reference input, REF, has a dynamic input

impedance and must therefore be driven by a low impedance

source with sufficient decoupling between the REF and GND

pins (as explained in the Layout section).

For optimum performance, drive the REF pin with a low output

impedance amplifier (such as the AD8031 or the AD8605) as a

reference buffer with a 10 µF (X5R, 0805 size) ceramic chip

decoupling capacitor.

If an unbuffered reference voltage is used, the decoupling value

depends on the reference used. For instance, a 22 µF (X5R,

1206 size) ceramic chip capacitor is appropriate for optimum

performance using a low temperature drift ADR431, ADR433,

ADR434, or ADR435 reference.

If desired, smaller reference decoupling capacitor values down

to 2.2 µF can be used with a minimal impact on performance,

especially DNL.

Regardless, there is no need for an additional lower value ceramic

decoupling capacitor (for example, 100 nF) between the REF

and GND pins.

POWER SUPPLY

The AD7687 is specified for use over a wide operating range of

2.3 V to 5.5 V. Unlike other low voltage converters, it has a low

enough noise to design a 16-bit resolution system with low

voltage supplies while maintaining respectable performance. It

uses two power supply pins: a core supply, VDD, and a digital

input/output interface supply, VIO. VIO allows direct interface

with any logic between 1.8 V and VDD. VIO and VDD can be

required in the overall design. The AD7687 is independent of

power supply sequencing between VIO and VDD.

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