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AD7687BCPZ-R2 数据表(PDF) 21 Page - Analog Devices |
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AD7687BCPZ-R2 数据表(HTML) 21 Page - Analog Devices |
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21 / 27 page ![]() AD7687 Data Sheet Rev. E | Page 20 of 26 CS MODE, 3-WIRE WITH BUSY INDICATOR This mode is usually used when a single AD7687 is connected to an SPI-compatible digital host having an interrupt input. Figure 36 shows the connection diagram and Figure 37 gives the corresponding timing. With SDI tied to VIO, a rising edge on CNV initiates a conversion, selects the CS mode, and forces SDO to high impedance. SDO is maintained in high impedance until the completion of the conversion irrespective of the state of CNV. Prior to the minimum conversion time, CNV can be used to select other SPI devices, such as analog multiplexers, but CNV must be returned low before the minimum conversion time and held low until the maximum conversion time to guarantee the generation of the BUSY signal indicator (see tCONV in Table 5). When the conversion is complete, SDO goes from high to low impedance. With a pull-up on the SDO line, this transition can be used as an interrupt signal to initiate the data reading controlled by the digital host. When using this option, select the value of the pull- up resistor such that it maintains an appropriate rise time on the SDO line for the application. This is a function of the resistance of the pull-up and the capacitance of the SDO line. The AD7687 then enters the acquisition phase and powers down. The data bits are then clocked out, MSB first, by subsequent SCK falling edges. The data is valid on both SCK edges. Although the rising edge can capture the data, a digital host using the SCK falling edge allows a faster reading rate (provided it has an acceptable hold time). After the optional 17th SCK falling edge, or when CNV goes high, whichever is earlier, SDO returns to high impedance. If multiple AD7687 devices are selected at the same time, the SDO output pin handles this contention without damage or induced latch-up. Keep this contention as short as possible to limit extra power dissipation. DATA IN IRQ CLK CONVERT VIO DIGITAL HOST 47k Ω CNV SCK SDO SDI VIO AD7687 Figure 36. CS Mode, 3-Wire with BUSY Indicator Connection Diagram (SDI High) SDO D15 D14 D1 D0 tDIS SCK 1 2 3 15 16 17 tSCK tSCKL tSCKH tHSDO tDSDO CNV CONVERSION ACQUISITION tCONV tCYC tCNVH tACQ ACQUISITION SDI = 1 Figure 37. CS Mode, 3-Wire with BUSY Indicator Serial Interface Timing (SDI High) |
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