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ATPL230A 数据表(PDF) 104 Page - ATMEL Corporation |
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ATPL230A 数据表(HTML) 104 Page - ATMEL Corporation |
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104 / 122 page ![]() ATPL230A [DATASHEET] Atmel-43053J-ATPL230A-Datasheet_22-Sep-16 104 9.3.8.2 PHY Layer Timer Register Name: TIMER_BEACON_REF Address: 0xFE47 - 0xFE4A Access: Read-only Reset: 0x00000000 Timer for the physical layer, which consists of a free-running clock measured in 10 μs steps. It indefinitely increases a unit each 10 microseconds, overflowing back to 0. It is set by hardware and is a read-only register. This register is used by the physical layer for being in accordance with PRIME specification. 31 30 29 28 27 26 25 24 TIMER_BEACON_REF (31:24) 23 22 21 20 19 18 17 16 TIMER_BEACON_REF (23:16) 15 14 13 12 11 10 9 8 TIMER_BEACON_REF (15:8) 76543210 TIMER_BEACON_REF (7:0) |
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