B roa dcom Co rpo rat ion

Preliminary Data Sheet

12/11/01

LIST OF TABLES

Table 1:

Auto-MDI/MDIX Pinout Assignments.............................................................................................. 8

Table 2:

MDI (Media Dependent Interface) Pins ........................................................................................ 11

Table 3:

RMII (Reduced Media Independent Interface) Pins ..................................................................... 12

Table 4:

SMI ( Serial Management Interface) Pins..................................................................................... 12

Table 5:

PHY Address Pins ........................................................................................................................ 13

Table 6:

Mode Pins..................................................................................................................................... 13

Table 7:

LED Pins....................................................................................................................................... 14

Table 8:

Miscellaneous Pins ....................................................................................................................... 14

Table 9:

Power and Ground Pins ............................................................................................................... 15

Table 10:

Registers 0-7 ................................................................................................................................ 16

Table 11:

Registers 8-31 .............................................................................................................................. 17

Table 12:

Register 0: Control........................................................................................................................ 17

Table 13:

Register 1: Status ......................................................................................................................... 18

Table 14:

Register 2: PHY Identifier 1 .......................................................................................................... 18

Table 15:

Register 3: PHY Identifier 2 .......................................................................................................... 19

Table 16:

Register 4: Auto-Negotiation Advertisement ................................................................................ 19

Table 17:

Register 5: Auto-Negotiation Link Partner Ability Register/Link Partner Next Page Message ..... 20

Table 18:

Register 6: Auto-Negotiation Expansion....................................................................................... 20

Table 19:

Register 7: Auto-Negotiation Next Page Transmit........................................................................21

Table 20:

Register 16: BT and Interrupt Level Control ................................................................................. 21

Table 21:

Register 17: Interrupt Control/Status ............................................................................................ 22

Table 22:

Register 18: Diagnostic ................................................................................................................ 23

Table 23:

Register 19: Test Register ............................................................................................................ 24

Table 24:

Register 20: Cable Measurement Capability ................................................................................ 24

Table 25:

Register 21: Receive Error Counter ............................................................................................. 25

Table 26:

Register 22: Power Management ................................................................................................. 25

Table 27:

Register 23: Operation Mode ....................................................................................................... 26

Table 28:

Register 24: CRC for Recent Received Packet ............................................................................26

Table 29:

Common Register 0: Common Operation Mode (Map to Phy Channel A, Reg 28) ..................... 27

Table 30:

Common Register 1: Test Mode (Map to Phy Channel A, Reg 29).............................................. 27

Table 31:

Common Register 2: Analog Settings (Map to Phy Channel A, Reg 30) ..................................... 28

Table 32:

4B/5B Code-Group Table ............................................................................................................. 28