AC104X-DS00-R datasheet(20/50 Pages) BOARDCOM

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■ AC104X

Preliminary Data Sheet

12/11/01

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Page 12 Section 2: Pin Description

Document

AC104X-DS00-405-R

Table 3:

RMII (Reduced Media Independent Interface) Pins

Pin Name

Pin #

Type

Description

TXD[1:0](A)

TXD[1:0](B)

TXD[1:0](C)

TXD[1:0](D)

84, 85

74, 75

60, 61

50, 51

I,D

RMII Transmit Data. The MAC sources the TXD[1:0](n) synchronous with REFCLK

when TX_EN(n) is asserted.

TX_EN(A)

TX_EN(B)

TX_EN(C)

TX_EN(D)

I,D

RMII Transmit Enable. TX_EN(n) is asserted high by the MAC to indicate that valid

data for transmission is presented on the TXD[1:0](n).

RXD[1:0](A)

RXD[1:0](B)

RXD[1:0](C)

RXD[1:0](D)

78,79

68,69

55,56

45,46

RMII Receive Data. The PHY sources the RXD[1:0](n) synchronous with REFCLK

when CRS_DV(n) is asserted.

CRS_DV(A)

CRS_DV(B)

CRS_DV(C)

CRS_DV(D)

CRS_DV(n) is asserted high when media is non-idle.

RX_ER(A)

RX_ER(B)

RX_ER(C)

RX_ER(D)

I/O,D

RMII Receive Error. When RX_ER is asserted high, it indicates an error has been

detected during frame reception.

REFCLK

Reference Clock Input – 50 MHz-100PPM TTL

Table 4:

SMI ( Serial Management Interface) Pins

Pin Name

Pin #

Type

Description

MDIO

I/O, D

Management Data Input/Output. Bi-directional data interface. 1.5K pull up resistor

required (as specified in IEEE-802.3).

MDC

I, D

Management Data Clock. 0 to 25 MHz clock sourced by the MAC for transfer of

MDIO data.

INTR

Interrupt. See Register 17. The INTR pin has a high impedance output. A 1K

Ω Re-

sister pull-up is required for this active low signal.

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