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DAC5686IPZP 数据表(PDF) 20 Page - Texas Instruments |
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DAC5686IPZP 数据表(HTML) 20 Page - Texas Instruments |
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20 / 46 page ![]() www.ti.com FIR1 FIR2 FIR3 FIR4 IOUTB1 IOUTB2 16-Bit DAC DA[15:0] DB[15:0] 2 – 16 y Fdata Fdata y2 B Gain B Offset FIR1 FIR2 FIR3 FIR4 y2 y2 y2 y2 y2 y2 y2 FIR5 x sin(x) + +/− cos sin sin cos DEMUX Serial Interface DAC5686 SLWS147B – APRIL 2003 – REVISED AUGUST 2004 DETAILED DESCRIPTION (continued) NCO mixing frequencies are programmed through 32-bit freq (4 registers); 16-bit phase adjustments are programmed through phase (2 registers). The NCO operates at the DAC update rate; thus, increased amounts of interpolation allow for higher IFs. More details for the NCO are provided in the NCO section. For mixing to Fdac/4, the DAC5686 provides a specific architecture that exploits the {… –1 0 1 0 …} resultant streams from sin and cos; the NCO is shut off in this mode to conserve power. Fdac/4 mix mode is implemented by deasserting nco in register config_msb while in single-sideband or quadrature modulation mode. Figure 23. Data Path in Quadrature Modulation Mode In quadrature modulation mode, only one output from the complex mixer stage is routed to the B DAC. The output can be expressed as: B(t) = I(t)sin( ω ct) + Q(t)cos(ωct) or B(t) = I(t)cos( ω ct) – Q(t)sin(ωct) Single-sideband up-conversion is achieved when I and Q are Hilbert transform pairs. Upper- or lower-sideband up-conversion is selected by ssb in the config_msb register, which selects the output from the mixer stage that is routed out. The offset and gain features for the B DAC, as previously described, are functional in the quadrature mode. The serial port of the DAC5686 is a flexible serial interface that communicates with industry-standard microprocessors and microcontrollers. The interface provides read/write access to all registers used to define the operating modes of the DAC5686. It is compatible with most synchronous transfer formats and can be configured as a 3- or 4-pin interface by sif4 in register config_msb. In both configurations, SCLK is the serial-interface input clock and SDENB is the serial-interface enable. For the 3-pin configuration, SDIO is a bidirectional pin for both data-in and data-out. For the 4-pin configuration, SDIO is data-in only and SDO is data-out only. 20 |
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