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DAC5686IPZP 数据表(PDF) 25 Page - Texas Instruments |
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DAC5686IPZP 数据表(HTML) 25 Page - Texas Instruments |
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25 / 46 page  www.ti.com DAC5686 SLWS147B – APRIL 2003 – REVISED AUGUST 2004 Table 3. Clock-Mode Configuration (continued) CLOCK MODE PLLVDD DIV[1:0] SEL[1:0] DATA RATE (MSPS) PLLLOCK PIN FUNCTION External dual clock 8 × 0 V XX 10 DC to 62.5 None - held low External dual clock 16 × 0 V XX 11 DC to 31.25 None - held low Interleaved input data on the DA[15:0] input pins; internal PLL off External 2 × 0 V XX 00 DC to 80 External clk2/clk2c clock ÷ 2 External 4 × 0 V XX 01 DC to 80 External clk2/clk2c clock ÷ 4 External 8 × 0 V XX 10 DC to 62.5 External clk2/clk2c clock ÷ 8 External 16 × 0 V XX 11 DC to 31.25 External clk2/clk2c clock ÷ 16 External dual clock 2 × 0 V XX 00 DC to 80 None - held low External dual clock 4 × 0 V XX 01 DC to 62.5 None - held low External dual clock 8 × 0 V XX 10 DC to 31.25 None - held low External dual clock 16 × 0 V XX 11 DC to 15.625 None - held low Non-interleaved input data; internal PLL on; DA[15:0] data rate matches DB[15:0] data rate. Internal 2 × 3.3 V 00 00 125 to 160 Internal PLL lock indicator Internal 2 × 3.3 V 01 00 62.5 to 125 Internal PLL lock indicator Internal 2 × 3.3 V 10 00 31.25 to 62.5 Internal PLL lock indicator Internal 2 × 3.3 V 11 00 15.63 to 31.25 Internal PLL lock indicator Internal 4 × 3.3 V 00 01 62.5 to 125 Internal PLL lock indicator Internal 4 × 3.3 V 01 01 31.25 to 62.5 Internal PLL lock indicator Internal 4 × 3.3 V 10 01 15.63 to 31.25 Internal PLL lock indicator Internal 4 × 3.3 V 11 01 7.8125 to 15.625 Internal PLL lock indicator Internal 8 × 3.3 V 00 10 31.25 to 62.5 Internal PLL lock indicator Internal 8 × 3.3 V 01 10 15.63 to 31.25 Internal PLL lock indicator Internal 8 × 3.3 V 10 10 7.8125 to 15.625 Internal PLL lock indicator Internal 8 × 3.3 V 11 10 3.9 to 7.8125 Internal PLL lock indicator Internal 16 × 3.3 V 00 11 15.625 to 31.25 Internal PLL lock indicator Internal 16 × 3.3 V 01 11 7.8125 to 15.625 Internal PLL lock indicator Internal 16 × 3.3 V 10 11 3.9062 to 7.8125 Internal PLL lock indicator Interleaved input data on the DA[15:0] input pins; internal PLL on Internal 2 × 3.3 V 00 00 Not recommended Internal PLL lock indicator Internal 2 × 3.3 V 01 00 62.5 to 80 Internal PLL lock indicator Internal 2 × 3.3 V 10 00 31.25 to 62.5 Internal PLL lock indicator Internal 2 × 3.3 V 11 00 15.625 to 31.25 Internal PLL lock indicator Internal 4 × 3.3 V 00 01 62.5 to 80 Internal PLL lock indicator Internal 4 × 3.3 V 01 01 31.25 to 62.5 Internal PLL lock indicator Internal 4 × 3.3 V 10 01 15.625 to 31.25 Internal PLL lock indicator Internal 4 × 3.3 V 11 01 7.8125 to 15.625 Internal PLL lock indicator Internal 8 × 3.3 V 00 10 31.25 to 62.5 Internal PLL lock indicator Internal 8 × 3.3 V 01 10 15.625 to 31.25 Internal PLL lock indicator Internal 8 × 3.3 V 10 10 7.8125 to 15.625 Internal PLL lock indicator Internal 8 × 3.3 V 11 10 3.9062 to 7.8125 Internal PLL lock indicator Internal 16 × 3.3 V 00 11 15.625 to 31.25 Internal PLL lock indicator Internal 16 × 3.3 V 01 11 7.8125 to 15.625 Internal PLL lock indicator Internal 16 × 3.3 V 10 11 3.9062 to 7.8125 Internal PLL lock indicator Internal 16 × 3.3 V 11 11 1.9531 to 3.9062 Internal PLL lock indicator 25 |
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