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ADMV4420ACPZ-R2 数据表(PDF) 39 Page - Analog Devices

部件名 ADMV4420ACPZ-R2
功能描述  K Band Downconverter with Integrated Fractional-N PLL and VCO
PDF  61 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADMV4420ACPZ-R2 数据表(HTML) 39 Page - Analog Devices

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Data Sheet
ADMV4420
Rev. A | Page 39 of 61
U3
CLR2
Q2
D2
U2
DOWN
UP
HIGH
HIGH
CPOUT
–IN
+IN
CHARGE
PUMP
DELAY
CLR1
Q1
D1
U1
Figure 123. PFD and CP Simplified Schematic
LOOP FILTER
Defining a loop filter for a PLL is dependent on several dynamics,
such as the PFD frequency, the N counter value, the tuning
sensitivity characteristics (kVCO) of the VCO, and the selected
CP current. A higher fPFD has the advantage of lowering inband
phase noise performance at the expense of integer boundary spur
levels when operating in fractional-N mode. Consequently, a
lower fPFD can allow the PLL to operate in integer-N mode,
which can eliminate integer boundary spurs at the expense of
higher inband phase noise performance. Given the trade-offs,
care must be taken with frequency planning and fPFD selection
to ensure the appropriate inband phase noise performance is
met with acceptable spur levels for the end application.
The loop filter, as implemented in the ADMV4420-EVALZ
evaluation board, is a third-order passive filter, as shown in
Figure 124. The filter is designed with the following simulation
input parameters: fPFD = 50 MHz, kVCO = 80 MHz/V, fVCO = 9.4 GHz
and ICP = 1.25 mA. The resulting loop filter bandwidth and
phase margin are 60 kHz and 45°, respectively.
For additional guidance with loop filter simulations on the
ADMV4420, contact Analog Devices, Inc., for technical
support.
CPOUT
VTUNE
C1
470pF
C2
6.8nF
R1
680Ω
R2
1.5kΩ
C3
220pF
C2
DNI
R3
0Ω
Figure 124. Recommended Loop Filter Schematic
CP CURRENT SETUP
For a specifically designed loop filter, the CP current (ICP) must
be set by adjusting the CP_CURRENT value in Register 0x22E.
The CP current follows the equation,
ICP = (CP_CURRENT + 1) × 312.5 μA
(7)
where CP_CURRENT is an integer value (0 to 15).
Note that the default value of CP_CURRENT is 3, which yields
a current of 1.25 mA. The applicable range is 312.5 µA to 5 mA,
with 312.5 µA steps.
To change the fPFD, if no change has been made to the existing
loop filter components, it is recommended to scale the ICP using
the following equation:
()
()
()
()
()
1.25 mA 50 MHz
×
×
=
=
CP DEFAULT
PFD DEFAULT
CP NEW
PFD NEW
PFD NEW
If
I
ff
(8)
where:
ICP(NEW) is the new desired ICP.
ICP(DEFAULT) is the default ICP.
fPFD(DEFAULT) is the default fPFD.
fPFD(NEW) is the new desired fPFD.
When ICP(NEW) is obtained, the CP_CURRENT value in
Register 0x22E can be updated using the round function,
()
_
ROUND
1
312.5 μA
CP NEW
I
CP CURRENT

=



(9)
where ROUND is the mathematical round function.
BLEED CURRENT (CP_BLEED) SETUP
The charge pump includes a binary scaled bleed current (IBLEED),
which is set by using the CP_BLEED value in Register 0x22F.
The bleed current introduces a slight phase offset in the PFD to
improve integer boundary spurs when operating in fractional-N
mode.
Generally, the bleed current follows Equation 10 and provides a
value that can be applicable for most applications, but there can
be additional spur level improvement by empirically
determining the appropriate bleed current value from actual
measurements for the intended application. The applicable
range is 0 µA to 956.25 µA, with 3.75 µA steps.
4
_
3.75 μA
CP
BLEED
I
I
CP BLEED
N
×
=
×
=
(10)
where CP_BLEED is an integer value (0 to 255).
When IBLEED is obtained, the CP_BLEED value in Register 0x22F
can be updated using the round function,
_
ROUND
3.75 μA
BLEED
I
CP BLEED
=
(11)
where IBLEED is the desired charge pump bleed current.
MUXOUT
The on-chip multiplexer output (MUXOUT) allows access to
various internal signals, in addition to providing a digital lock
detect function. A representative diagram is shown in
Figure 125. The state of the MUXOUT pin is determined from
the PLL_MUX_SEL value in Register 0x213. See Table 31 for
full details.



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