ADMV4420ACPZ-R2 datasheet(6/61 Pages) AD

部件名	ADMV4420ACPZ-R2

功能描述	K Band Downconverter with Integrated Fractional-N PLL and VCO

PDF	61 Pages

Scroll/Zoom	100%

制造商	AD [Analog Devices]

网页	http://www.analog.com

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6 / 61 page

ADMV4420

Data Sheet

Rev. A | Page 6 of 61

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

SUPPLY VOLTAGE

VVPOS1_VCO, VVPOS2_PLL, VVPOS3_CP, VVPOS4_IF

4.75

5.00

5.25

TOTAL POWER CONSUMPTION

Active Mode

1900

Sleep Mode

All blocks powered down

EXTERNAL PLL REFERENCE

Frequency

MHz

Amplitude

0.3

2.5

V p-p

Single-ended input, high impedance

CRYSTAL REFERENCE

Crystal Frequency

MHz

Fundamental mode

Capacitance

PHASE FREQUENCY DETECTOR (PFD)

FREQUENCY

MHz

Compare frequency

REFERENCE SPURS

−70

dBm

FREQUENCY SETTLING

400

μs

After frequency change programmed; within 50 kHz resolution

CLOSED-LOOP PHASE NOISE

LO frequency = 16.75 GHz to 21.15 GHz

−80

dBc/Hz

10 kHz offset

−85

dBc/Hz

100 kHz offset

−116

dBc/Hz

1 MHz offset

−125

dBc/Hz

10 MHz offset

LOGIC

(ENBL0, ENBL1, SDO, SDI, SCLK,

CS)

Logic Low

−0.3

+0.5

Logic High

1.2

3.3

3.6

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