ADMV4420ACPZ-R2 datasheet(1/61 Pages) AD

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ADMV4420ACPZ-R2 数据表(PDF) 1 Page - Analog Devices

部件名	ADMV4420ACPZ-R2

功能描述	K Band Downconverter with Integrated Fractional-N PLL and VCO

PDF	61 Pages

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制造商	AD [Analog Devices]

网页	http://www.analog.com

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K Band Downconverter with Integrated

Fractional-N PLL and VCO

Data Sheet

ADMV4420

Rev. A

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Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother

rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Technical Support

www.analog.com

FEATURES

RF front end with integrated RF balun and LNA

Double balanced, active mixer with high dynamic range IF

amplifier

Fractional-N synthesizer with low phase noise, multicore VCO

5 V supply operation with integrated LDO regulators

Output P1dB: 7 dBm

Output IP3: 16 dBm

Conversion gain: 36 dB

Noise figure: 7 dB

RF input frequency range: 16.95 GHz to 22.05 GHz

Internal LO frequency range: 16.35 GHz to 21.15 GHz

IF frequency range: 900 MHz to 2500 MHz

Single-ended 50 Ω input impedance and 75 Ω IF output

impedance

Programmable via 4-wire SPI

32-lead, 5 mm × 5 mm LFCSP

APPLICATIONS

Satellite communication

Point to point microwave communication

GENERAL DESCRIPTION

The ADMV4420 is a highly integrated, double balanced, active

mixer with an integrated fractional-N synthesizer, ideally suited

for next generation K band satellite communications.

The RF front end consists of an integrated RF balun and low

noise amplifier (LNA) for an optimal, 7 dB, single-sideband

noise figure while minimizing external components. Additionally,

the high dynamic range IF output amplifier provides a nominal

conversion gain of 36 dB.

An integrated low phase noise, fractional-N, phase-locked loop

(PLL) with a multicore voltage controlled oscillator (VCO) and

internal 2× multiplier generate the necessary on-chip LO signal

for the double balanced mixer, eliminating the need for external

frequency synthesis. The multicore VCO uses an internal

autocalibration routine that allows the PLL to select the

necessary settings and lock in approximately 400 µs.

The reference input to the PLL employs a differentially excited

50 MHz crystal oscillator. Alternatively, the reference input can

be driven by an external, singled-ended, 50 MHz source. The

phase frequency detector (PFD) comparison frequency of the

PLL operates up to 50 MHz.

The ADMV4420 is fabricated on a silicon germanium (SiGe),

bipolar complementary metal-oxide semiconductor (BiCMOS)

process, and is available in a 32-lead, RoHS compliant, 5 mm ×

5 mm LFCSP package with an exposed pad. The device is

specified over the −40°C to +85°C temperature range on a 5 V

power supply.

类似零件编号 - ADMV4420ACPZ-R2

制造商	部件名	数据表	功能描述
Analog Devices	ADMV4530	1Mb / 59P	Dual-Mode, Ka Band Upconverter with Integrated Fractional-N PLL and VCO 3/2020-Rev. 0 to Rev. A
	ADMV4530ACCZ	1Mb / 59P	Dual-Mode, Ka Band Upconverter with Integrated Fractional-N PLL and VCO 3/2020-Rev. 0 to Rev. A
	ADMV4530ACCZ-RL7	1Mb / 59P	Dual-Mode, Ka Band Upconverter with Integrated Fractional-N PLL and VCO 3/2020-Rev. 0 to Rev. A
	ADMV4530IF-EVALZ	1Mb / 59P	Dual-Mode, Ka Band Upconverter with Integrated Fractional-N PLL and VCO 3/2020-Rev. 0 to Rev. A
	ADMV4530IQ-EVALZ	1Mb / 59P	Dual-Mode, Ka Band Upconverter with Integrated Fractional-N PLL and VCO 3/2020-Rev. 0 to Rev. A

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类似说明 - ADMV4420ACPZ-R2

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