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ADE7763ARS 数据表(PDF) 49 Page - Analog Devices |
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ADE7763ARS 数据表(HTML) 49 Page - Analog Devices |
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49 / 56 page ![]() ADE7763 Rev. A | Page 49 of 56 Address Name R/W No. Bits Default Type1 Description 0x27 PERIOD R 16 0x0 U Period of the Channel 2 (Voltage Channel) Input Estimated by Zero- Crossing Processing. The MSB of this register is always zero. 0x28– 0x3C Reserved. 0x3D TMODE R/W 8 – U Test Mode Register. 0x3E CHKSUM R 6 0x0 U in the previous reads—see the Serial Read Operation section. Checksum Register. This 6-bit, read-only register is equal to the sum of all the ones 0x3F DIEREV R 8 – U Die Revision Register. This 8-bit, read-only register contains the revision number of the silicon. 1 Type decoder: U = unsigned, S = signed by twos complement method, and S* = signed by sign magnitude method. |
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