STPMIC1 datasheet(49/140 Pages) STMICROELECTRONICS

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5.2.2

State explanations

NO_SUPPLY

VIN is below VIN_POR_Fall - see Section 5.4.1 VIN conditions and monitoring. No output state can be guaranteed

in this state.

PRELOAD_NVM

State is immediately reached after VIN transition above VIN_POR_Rise.

NVM download is performed in this state. (see Section 5.5.2 Non-volatile memory (NVM))

If automatic turn-on condition is set in NVM, AUTO_TURN_ON bit in Table 65. NVM_MAIN_CTRL_SHR,

transition is made to CHECK&LOAD, else to OFF-state. Refer to Section 5.4.2 Turn-ON conditions.

RSTn is asserted by the STPMIC1 and all regulators are off.

OFF

State is entered after PRELOAD_NVM from POR_VIN, or when a turn-OFF condition occurs from POWER_ON.

Transition to CHECK&LOAD state is made of any turn-ON condition. Refer to Section 5.4.3 Turn-OFF conditions

and restart_request.

RSTn is asserted by the STPMIC1 and all regulators are OFF.

LOCK_OCP

This state is an alternative to OFF-state in the context of overcurrent protection safety feature.

This state occurs if an overcurrent has been detected and LOCK_OCP bit has been set in

Table 65. NVM_MAIN_CTRL_SHR register.

As soon as an overcurrent is detected from any regulator, the STPMIC1 immediately performs a POWER_DOWN

sequence and goes permanently to LOCK_OCP state (passing through OFF-state). LOCK_OCP_FLAG internal

bit is set to prevent state machine from leaving LOCK_OCP state.

LOCK_OCP_FLAG bit can only been reset by VIN_POR_Fall (removing application power supply source)

and optionally by a PONKEYn long key press if PKEY_CLEAR_OCP_FLAG bit has been set in

Table 31. PKEY_TURNOFF_CR.

Refer to Section 5.4.7 Overcurrent protection (OCP) for further details.

RSTn is assert by the STPMIC1 and all regulators are off.

CHECK&LOAD

This state is a combination of three initialization steps in this order:

•

CHECK_TEMP: The STPMIC1 starts a thermal monitoring and control that junction temperature (Tj) is in

functional range before going to next state. Refer to Section 5.4.6 Thermal protection.

•

LOAD_NVM: The STPMIC1 performs a load of the NVM, initializing related registers to their default state.

•

CHECK_VIN: The STPMIC1 starts VIN monitoring and control that the applied VIN is in functional range

before going to next state. Refer to Section 5.4.1 VIN conditions and monitoring for details. RSTn is

asserted by the STPMIC1 and all regulators are off.

POWER_UP

The STPMIC1 sequentially starts regulators following a rank procedure. Refer to Section 5.3 POWER_UP,

POWER_DOWN sequence for detailed description. RSTn is asserted by the STPMIC1.

POWER_ON

RSTn is released and monitored (digital input) by the STPMIC1. RSTn signal can be driven externally by the

application processor or a reset push-button.

The STPMIC1 delivers by default the power as per configuration in main mode, through Section 6.3.1 Main

control register (MAIN_CR) registers of each regulator.

The STPMIC1 can optionally switch to ALTERNATE mode, controlled by the application processor through

PWRCTRL pin. As described in Section 5.4.5 Power control modes (MAIN / ALTERNATE) for details.

The STPMIC1 exits POWER_ON state if:

•

A turn-OFF condition occurs. See Section 5.4.3 Turn-OFF conditions and restart_request

•

RSTn is asserted by the application processor. See Section 5.4.4 Reset and mask_reset option

POWER_DOWN

The STPMIC1 sequentially stops regulators following the rank procedure in reverse order than POWER_UP.

Refer to Section 5.3 POWER_UP, POWER_DOWN sequence for a more detailed description.

STPMIC1

Functional state machine

DS12792 - Rev 7

page 49/140

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