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STPMIC1 数据表(PDF) 78 Page - STMicroelectronics |
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STPMIC1 数据表(HTML) 78 Page - STMicroelectronics |
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78 / 140 page ![]() 6.3.4 LDO1-4 pull-down control register (LDO14_PD_CR) Table 28. LDO14_PD_CR 7 6 5 4 3 2 1 0 LDO4_PD[1:0] LDO3_PD[1:0] LDO2_PD[1:0] LDO1_PD[1:0] R/W R/W R/W R/W R/W R/W R/W R/W Address: 0x13 Type: read/write register Default: 0x00 Description: LDO1-4 pull-down control register. This register is initialized to default values upon entering to CHECK&LOAD state. [7:6] LDO4_PD[1:0]: 00: PD active when ENA of LDO4 = 0 01: PD forced inactive 10: PD forced inactive 11: PD forced active [5:4] LDO3_PD[1:0]: 00: PD active when ENA of LDO3 = 0 01: PD forced inactive 10: PD forced inactive 11: PD forced active [3:2] LDO2_PD[1:0]: 00: PD active when ENA of LDO2 = 0 01: PD forced inactive 10: PD forced inactive 11: PD forced active [1:0] LDO1_PD[1:0]: 00: PD active when ENA of LDO1 = 0 01: PD forced inactive 10: PD forced inactive 11: PD forced active STPMIC1 Control registers DS12792 - Rev 7 page 78/140 |
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