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STPMIC1 数据表(PDF) 72 Page - STMicroelectronics |
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STPMIC1 数据表(HTML) 72 Page - STMicroelectronics |
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72 / 140 page ![]() 6.2.4 Overcurrent protection buck turn-OFF status register (OCP_BUCKS_BSW_SR) Table 22. OCP_BUCKS_BSW_SR 7 6 5 4 3 2 1 0 reserved OCP_BOOST OCP_SWOUT OCP_VBUSOTG OCP_BUCK4 OCP_BUCK3 OCP_BUCK2 OCP_BUCK1 R R R R R R R R Address: 0x04 Type: read register only Default: b00xx_xxxx where x depends on possible OCP event during previous POWER_ON Description: OCP buck turn-OFF status register. This register stores the identification of the BUCK, BOOST or power switch source of the last OCP turn-OFF. It is set during POWER_DOWN state. [7] Reserved [6] OCP_BOOST: Last turn-OFF was due to overcurrent protection on BOOST 0: False 1: True [5] OCP_SWOUT: Last turn-OFF was due to overcurrent protection on SWOUT pin (PWR_SW out) 0: False 1: True [4] OCP_VBUSOTG: Last turn-OFF was due to overcurrent protection on VBUSTOTG pin (PWR_USB_SW out) 0: False 1: True [3] OCP_BUCK4: Last turn-OFF was due to overcurrent protection on BUCK4 0: False 1: True [2] OCP_BUCK3: Last turn-OFF was due to overcurrent protection on BUCK3 0: False 1: True [1] OCP_BUCK2: Last turn-OFF was due to overcurrent protection on BUCK2 0: False 1: True [0] OCP_BUCK1: Last turn-OFF was due to overcurrent protection on BUCK1 0: False 1: True STPMIC1 Status registers DS12792 - Rev 7 page 72/140 |
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