STPMIC1 datasheet(134/140 Pages) STMICROELECTRONICS

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6.3.8

Mask reset Buck control register (BUCKS_MRST_CR)........................... 82

6.3.9

Mask reset LDO control register (LDOS_MRST_CR) ............................ 83

6.3.10

Watchdog control register (WDG_CR) ....................................... 84

6.3.11

Watchdog timer control register (WDG_TMR_CR) .............................. 85

6.3.12

Bucks OCP turn-OFF control register (BUCKS_OCPOFF_CR) .................... 86

6.3.13

LDO OCP turn-OFF control register (LDOS_OCPOFF_CR) ....................... 87

6.4

Power supplies control registers ................................................. 88

6.4.1

BUCKx MAIN mode control registers (BUCKx_MAIN_CR) (x=1…4) ................. 88

6.4.2

REFDDR MAIN mode control register (REFDDR_MAIN_CR) ...................... 89

6.4.3

LDOx MAIN mode control registers (LDOx_MAIN_CR) (x=1, 2, 5, 6) ................ 90

6.4.4

LDO3 MAIN mode control register (LDO3_MAIN_CR) ........................... 91

6.4.5

LDO4 MAIN mode control register (LDO4_MAIN_CR) ........................... 92

6.4.6

BUCKx ALTERNATE mode control registers (BUCKx_ALT_CR)(x=1..4).............. 93

6.4.7

REFDDR ALTERNATE mode control register (REFDDR_ALT_CR) ................. 94

6.4.8

LDOx ALTERNATE mode control registers (LDOx_ALT_CR) (x=1, 2, 5, 6) ............ 95

6.4.9

LDO3 ALTERNATE mode control register (LDO3_ALT_CR) ....................... 96

6.4.10

LDO4 ALTERNATE mode control register (LDO4_ALT_CR) ....................... 97

6.4.11

Boost/switch control register (BST_SW_CR) .................................. 98

6.5

Interrupt registers ............................................................. 99

6.5.1

Overall interrupt register behavior ........................................... 99

6.5.2

Interrupt pending register 1 (INT_PENDING_R1) .............................. 100

6.5.3

Interrupt pending register 2 (INT_PENDING_R2) .............................. 101

6.5.4

Interrupt pending register 3 (INT_PENDING_R3) .............................. 102

6.5.5

Interrupt pending register 4 (INT_PENDING_R4) .............................. 103

6.5.6

Interrupt debug latch registers (INT_DBG_LATCH_Rx) ......................... 104

6.5.7

Interrupt clear registers (INT_CLEAR_Rx) ................................... 105

6.5.8

Interrupt mask registers (INT_MASK_Rx) .................................... 106

6.5.9

Interrupt set mask registers (INT_SET_MASK_Rx)............................. 107

6.5.10

Interrupt clear mask registers (INT_CLEAR_MASK_Rx)......................... 108

6.5.11

Interrupt source register 1 (INT_SRC_R1) ................................... 109

6.5.12

Interrupt source register 2 (INT_SRC_R2) ................................... 110

6.5.13

Interrupt source register 3 ( INT_SRC_R3) ................................... 111

STPMIC1

Contents

DS12792 - Rev 7

page 134/140

STPMIC1 数据表(PDF) 134 Page - STMicroelectronics

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