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AD4021BCPZ-R2 数据表(PDF) 4 Page - Analog Devices

部件名 AD4021BCPZ-R2
功能描述  20-Bit, 1.8 MSPS/1 MSPS/500 kSPS, Easy Drive, Differential SAR ADCs
PDF  39 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD4021BCPZ-R2 数据表(HTML) 4 Page - Analog Devices

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AD4020/AD4021/AD4022
Data Sheet
Rev. B | Page 4 of 39
SPECIFICATIONS
VDD = 1.71 V to 1.89 V, VIO = 1.71 V to 5.5 V, REF pin voltage (VREF) = 5 V, all specifications TMIN to TMAX, high-Z mode disabled, span
compression disabled, turbo mode enabled, and sampling frequency (fS) = 1.8 MSPS for the AD4020, fS = 1 MSPS for the AD4021, and
fS = 500 kSPS for the AD4022, unless otherwise noted.
Table 1.
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
RESOLUTION
20
Bits
ANALOG INPUT
Voltage Range
IN+ voltage (VIN+) – IN− voltage
(VIN−)
−VREF
+VREF
V
Span compression enabled
−VREF × 0.8
+VREF × 0.8
V
Operating Input Voltage
VIN+, VIN− to GND
−0.1
+VREF + 0.1
V
Span compression enabled
0.1 × VREF
0.9 × VREF
V
Common-Mode Input Range
VREF/2 − 0.125
VREF/2
VREF/2 + 0.125
V
Common-Mode Rejection Ratio (CMRR)
Input frequency (fIN) = 500 kHz
68
dB
Analog Input Current
Acquisition phase, TA = 25°C
0.3
nA
High-Z mode enabled, converting
dc input at 1.8 MSPS
1
µA
THROUGHPUT
Complete Cycle
AD4020
555
ns
AD4021
1000
ns
AD4022
2000
ns
Conversion Time
300
320
350
ns
Acquisition Phase1
AD4020
325
ns
AD4021
770
ns
AD4022
1770
ns
Throughput Rate2 (fS)
AD4020
0
1.8
MSPS
AD4021
0
1
MSPS
AD4022
0
500
kSPS
Transient Response3
325
ns
DC ACCURACY
No Missing Codes
20
Bits
Integral Nonlinearity Error (INL)
−3.1
±1
+3.1
ppm
T = 0°C to 70°C
−2
±1
+2
ppm
Differential Nonlinearity Error (DNL)
−0.5
±0.3
+0.5
LSB
Transition Noise
3.3
LSB
Zero Error
−35
+35
LSB
Zero Error Drift4
−0.3
+0.3
ppm/°C
Gain Error
−88
±12
+88
LSB
Gain Error Drift4
−1.2
+1.2
ppm/°C
Power Supply Sensitivity
VDD = 1.8 V ± 5%
±6
LSB
1/f Noise5
Bandwidth = 0.1 Hz to 10 Hz
6
µV p-p



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