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MPC8275VR 数据表(PDF) 30 Page - Motorola, Inc |
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MPC8275VR 数据表(HTML) 30 Page - Motorola, Inc |
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30 / 76 page ![]() 30 MPC8280 PowerQUICC II™ Family Hardware Specifications MOTOROLA Clock Configuration Modes 1101_101 125.0 166.7 2 250.0 333.3 3 375.0 500.0 5 50.0 66.7 1101_110 125.0 166.7 2 250.0 333.3 4 500.0 666.6 5 50.0 66.7 1110_000 100.0 133.3 3 300.0 400.0 3.5 350.0 466.6 6 50.0 66.7 1110_001 100.0 133.3 3 300.0 400.0 4 400.0 533.3 6 50.0 66.7 1110_010 100.0 133.3 3 300.0 400.0 4.5 450.0 599.9 6 50.0 66.7 1110_011 100.0 133.3 3 300.0 400.0 5 500.0 666.6 6 50.0 66.7 1110_100 100.0 133.3 3 300.0 400.0 5.5 550.0 733.3 6 50.0 66.7 1100_000 Reserved 1100_001 Reserved 1100_010 Reserved 1 “Low” values are the minimum allowable frequencies for a given clock mode. The minimum bus frequency guarantees the required minimum CPU operating frequency. Minimum CPU frequency is determined by the clock mode. For modes with a CPU multiplication factor ≤ 3, the minimum CPU frequency is 166 MHz.The minimum CPM frequency is 133 MHz. For modes with a CPU multiplication factor ≥ 3.5, the minimum CPU frequency is 250 MHz. The minimum CPM frequency is as shown in the table. “High” values are for the purpose of illustration only. Users must select a mode and input bus frequency so that the resulting configuration does not exceed the frequency rating of the user’s device. 2 As Table 14 shows, PCI_MODCK determines the PCI clock frequency range. Refer to Table 17 for lower configurations. 3 MODCK_H = hard reset configuration word [28–31]. MODCK[1-3] = three hardware configuration pins. 4 60x and local bus frequency. Identical to CLKIN. 5 CPM multiplication factor = CPM clock/bus clock 6 CPU multiplication factor = Core PLL multiplication factor Table 17. Clock Configurations for PCI Host Mode (PCI_MODCK=1)1,2 Mode3 Bus Clock4 (MHz) CPM Multiplication Factor5 CPM Clock (MHz) CPU Multiplication Factor6 CPU Clock (MHz) PCI Division Factor PCI Clock (MHz) MODCK_H- MODCK[1-3] low high low high low high low high Default Modes (MODCK_H=0000) 0000_000 66.7 100.0 2 133.3 200.0 2.5 166.7 250.0 4 33.3 50.0 0000_001 66.7 100.0 2 133.3 200.0 3 200.0 300.0 4 33.3 50.0 0000_010 60.0 120.0 2.5 150.0 300.0 3 180.0 360.0 6 25.0 50.0 0000_011 71.4 120.0 2.5 178.6 300.0 3.5 250.0 420.0 6 29.8 50.0 0000_100 62.5 120.0 2.5 156.3 300.0 4 250.0 480.0 6 26.0 50.0 Table 16. Clock Configurations for PCI Host Mode (PCI_MODCK=0)1,2 (Continued) Mode3 Bus Clock4 (MHz) CPM Multiplication Factor5 CPM Clock (MHz) CPU Multiplication Factor6 CPU Clock (MHz) PCI Division Factor PCI Clock (MHz) MODCK_H- MODCK[1-3] low high low high low high low high |
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