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MPC8275VR 数据表(PDF) 34 Page - Motorola, Inc

部件名 MPC8275VR
功能描述  PowerQUICC II Family Hardware Specifications
PDF  76 Pages
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制造商  MOTOROLA [Motorola, Inc]
网页  http://www.freescale.com
标志 MOTOROLA - Motorola, Inc

MPC8275VR 数据表(HTML) 34 Page - Motorola, Inc

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MPC8280 PowerQUICC II™ Family Hardware Specifications
MOTOROLA
Clock Configuration Modes
7.3
PCI Agent Mode
Table 18 and Table 19 show configurations for PCI agent mode. The frequencies listed are for the purpose
of illustration only. Users must select a mode and input bus frequency so that the resulting configuration
does not exceed the frequency rating of the user’s device. In addition, note the following:
NOTE: PCI_MODCK
In PCI mode only, PCI_MODCK comes from the LGPL5 pin and
MODCK_H[0–3] comes from {LGPL0, LGPL1, LGPL2, LGPL3}.
NOTE: Tval (Output Hold)
The minimum Tval = 2 when PCI_MODCK = 1, and the minimum
Tval = 1 when PCI_MODCK = 0. Therefore, designers should use clock
configurations that fit this condition to achieve PCI-compliant AC timing.
1 “Low” values are the minimum allowable frequencies for a given clock mode. The minimum bus frequency guarantees the
required minimum CPU operating frequency. Minimum CPU frequency is determined by the clock mode.
For modes with a CPU multiplication factor
≤ 3, the minimum CPU frequency is 166 MHz. The minimum CPM frequency
is 133 MHz.
For modes with a CPU multiplication factor
≥ 3.5, the minimum CPU frequency is 250 MHz. The minimum CPM frequency
is as shown in the table.
“High” values are for the purpose of illustration only. Users must select a mode and input bus frequency so that the resulting
configuration does not exceed the frequency rating of the user’s device.
2 As Table 14 shows, PCI_MODCK determines the PCI clock frequency range. Refer to Table 16 for higher configurations.
3 MODCK_H = hard reset configuration word [28–31]. MODCK[1-3] = three hardware configuration pins.
4 60x and local bus frequency. Identical to CLKIN.
5 CPM multiplication factor = CPM clock/bus clock
6 CPU multiplication factor = Core PLL multiplication factor
Table 18. Clock Configurations for PCI Agent Mode (PCI_MODCK=0)1,2
Mode3
PCI Clock
(MHz)
CPM
Multiplication
Factor4
CPM Clock
(MHz)
CPU
Multiplication
Factor5
CPU Clock
(MHz)
Bus
Division
Factor
Bus Clock
(MHz)
MODCK_H-
MODCK[1-3]
low
high
low
high
low
high
low
high
Default Modes (MODCK_H=0000
0000_000
66.7
66.7
2
133.3 133.3
2.5
166.7 166.7
2
66.7
66.7
0000_001
66.7
66.7
2
133.3 133.3
3
200.0 200.0
2
66.7
66.7
0000_010
55.5
66.7
3
166.7 200.0
3
166.7 200.0
3
55.5
66.7
0000_011
62.5
66.7
3
187.5 200.0
4
250.0 266.6
3
62.5
66.7
0000_100
50.0
66.7
3
150.0 200.0
3
180.0 240.0
2.5
60.0
80.0
0000_101
59.5
66.7
3
178.6 200.0
3.5
250.0 280.0
2.5
71.4
80.0
0000_110
53.6
66.7
4
214.3 266.6
3.5
250.0 311.1
3
71.4
88.9
0000_111
50.0
66.7
4
200.0 266.6
3
240.0 320.0
2.5
80.0
106.7
Full Configuration Modes
0001_001
Reserved



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