MPC8275VR datasheet(23/76 Pages) MOTOROLA

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MOTOROLA

MPC8280 PowerQUICC II™ Family Hardware Speciﬁcations

Clock Conﬁguration Modes

Figure 12 is a representation of the information in Table 13.

Figure 12. Internal Tick Spacing for Memory Controller Signals

NOTE

The UPM machine outputs change on the internal tick determined by the

memory controller programming; the AC speciﬁcations are relative to the

internal tick. Note that SDRAM and GPCM machine outputs change on

CLKin’s rising edge.

Clock Conﬁguration Modes

The MPC8280 has three clocking modes: local, PCI host, and PCI agent. The clocking mode is set according

to three input pins—PCI_MODE, PCI_CFG[0], PCI_MODCK—as shown in Table 14.

Table 13. Tick Spacing for Memory Controller Signals

PLL Clock Ratio

Tick Spacing (T1 Occurs at the Rising Edge of CLKin)

1:2, 1:3, 1:4, 1:5, 1:6

1/4 CLKin

1/2 CLKin

3/4 CLKin

1:2.5

3/10 CLKin

1/2 CLKin

8/10 CLKin

1:3.5

4/14 CLKin

1/2 CLKin

11/14 CLKin

Table 14. MPC8280 Clocking Modes

Pins

Clocking Mode

PCI Clock

Frequency Range

(MHZ)

Reference

PCI_MODE

PCI_CFG[0] PCI_MODCK1

1 Determines PCI clock frequency range. Refer to Sections 7.2 and 7.3.

—

Local bus

—

Table 15

PCI host

50–66

Table 16

25–50

Table 17

PCI agent

50–66

Table 18

25–50

Table 19

CLKin

for 1:2.5

for 1:3.5

CLKin

for 1:2, 1:3, 1:4, 1:5, 1:6

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