MPC8275VR datasheet(14/76 Pages) MOTOROLA

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MPC8280 PowerQUICC II™ Family Hardware Speciﬁcations

MOTOROLA

Power Dissipation

Table 7 provides preliminary, estimated power dissipation for various conﬁgurations. Note that suitable

thermal management is required to ensure the junction temperature does not exceed the maximum speciﬁed

value. Also note that the I/O power should be included when determining whether to use a heat sink. For a

complete list of possible clock conﬁgurations, refer to Section 7, “Clock Conﬁguration Modes.”

AC Electrical Characteristics

The following sections include illustrations and tables of clock diagrams, signals, and CPM outputs and

inputs for 66.67/83.33/100 MHz devices. Note that AC timings are based on a 50-pf load. Typical output

buffer impedances are shown in Table 8.

Table 7. Estimated Power Dissipation for Various Conﬁgurations1

1 Test temperature = 105˚ C

Bus

(MHz)

CPM

Multiplication

Factor

CPM

(MHz)

CPU

Multiplication

Factor

CPU

(MHz)

PINT(W)

2,3

2 P

INT = IDD x VDD Watts

3 Values do not include I/O. Add the following estimates for active I/O based on the following bus speeds:

66.7 MHz = 0.45 W (nominal), 0.5 W (maximum)

83.3 MHz = 0.5W (nominal), 0.6 W (maximum)

100 MHz = 0.6 W (nominal), 0.7 W (maximum)

Vddl 1.5 Volts

Nominal

Maximum

66.67

2.5

166

3.5

233

0.95

1.0

66.67

2.5

166

266

1.0

1.05

66.67

200

266

1.05

1.1

66.67

3.5

233

4.5

300

1.05

1.15

83.33

250

333

1.25

1.35

83.33

250

4.5

375

1.3

1.4

83.33

3.5

292

417

1.45

1.55

100

300

400

1.5

1.6

100

300

4.5

450

1.55

1.65

Table 8. Output Buffer Impedances1

1 These are typical values at 65˚ C. Impedance may vary by ±25% with process and temperature.

Output Buffers

Typical Impedance (

Ω)

60x bus

45 or 272

2 On silicon revision 0.0 (mask #: 0K49M), selectable impedance is not available. Impedance is set at 45 Ω.

On all other revisions, impedance value is selected through the SIUMCR[20,21]. Refer to the MPC8280 Addendum to

the MPC8260 PowerQUICC II Family Reference Manual.

Local bus

Memory controller

45 or 272

Parallel I/O

PCI

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