MCP3564-ESLASHST datasheet(42/108 Pages) MICROCHIP

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MCP3561/2/4

DS20006181C-page 42

 2019-2021 Microchip Technology Inc.

5.6

ADC Output Data Format

The ADC Output Data (ADCDATA) register is located at

the address: 0x0. The default length of the register is

24-bit (23-bit + sign).

Output data are calculated in the digital decimation

filter with a much larger resolution and rounded to the

closest LSb value.

The rounding ensures a maximum 1/2 LSb error

instead of a simple truncation that ensures a 1 LSb

maximum error.

Equation 5-5 calculates the ADC output code as a

function of the input and reference signals for DC

inputs.

EQUATION 5-5:

ADC OUTPUT CODE FOR DC INPUT (DATA_FORMAT[1:0] = 00)

For AC sine wave inputs, the decimation filter transfer

function (see Equation 5-3) induces an additional gain

on the ADC output code, which depends on the input

frequency (roll-off of the decimation filter).

For any inputs, the VIN+/VIN- voltages are averaged out

during the whole conversion time as the ADC is an

oversampling converter.

ADC output format is set by the DATA_FORMAT[1:0]

bits in the CONFIG3 register. These bits define four

different possible formats for the ADC Data Output

the MCP3561/2/4.

Figure 5-8 describes all possible data formats.

FIGURE 5-8:

ADC Output Format Selection.

When DATA_FORMAT[1:0] = 0x, the ADC data are

represented on 24 bits (23-bit plus sign). The ADC

output code is represented with MSb first signed two’s

complement coding. With these two data formats, the

coding does not allow overrange; the equivalent analog

input range is [-VREF; +VREF – 1 LSb]. When

VIN *Gain > VREF – 1 LSb, the 24-bit ADC code

(SGN+DATA[22:0]) will saturate and be locked at

0x7FFFFF. When VIN * Gain < -VREF, the 24-bit ADC

code will saturate and be locked at 0x800000. Using

these data formats does not permit correctly evaluating

full-scale errors in case of a positive full-scale error.

When DATA_FORMAT[1:0] = 00, the output register

shows

only

the

24-bit

value.

When

DATA_FORMAT[1:0] = 01, the output register is 32 bits

long and the output code is padded with additional

zeros on the last byte. The output code is left justified

in this case. This format is useful for 32-bit MCU

applications.

ADC_OUTPUT(LSb)

VIN+ VIN-

–

VREF+ VREF-

–

-----------------------------------------







8,388,608 GAIN



CH_ID[3:0]

DATA[23:0]

SGN ext (4-bit)

DATA[23:0]

SGN ext (8-bit)

SGN + DATA[22:0]

SGN+ DATA[22:0]

0x00

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