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MCP3564-E/ST 数据表(PDF) 79 Page - Microchip Technology |
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MCP3564-E/ST 数据表(HTML) 79 Page - Microchip Technology |
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79 / 108 page ![]() 2019-2021 Microchip Technology Inc. DS20006181C-page 79 MCP3561/2/4 7.3 Power Supply Design and Bypassing In any system, the analog ICs (such as references or operational amplifiers) are always connected to the analog ground plane. The MCP3561/2/4 should also be considered a sensitive analog component and con- nected to the analog ground plane. The ADC features two pairs of power supply voltage pins: AGND and AVDD, DGND and DVDD. For best performance, it is recommended to keep the two pairs of pins connected to two different networks (see Figure 7-5), so that the design will feature two ground traces and two power supplies (see Figure 7-6). The analog circuitry (including MCP3561/2/4) and the digital circuitry (MCU) should have separate power supplies and return paths to the external ground refer- ence, as described in Figure 7-5. An example of a typical power supply circuit, with different paths for analog and digital return currents, is shown in Figure 7-6. A possible split example is shown in Figure 7-7, where the ground star connection can be located underneath the device with the exposed pad. The split between analog and digital can be done under the device, and AVDD and DVDD can be connected with lines coming under the ground plane. The two separate return paths will eventually share a unique connection point (star connection) in order to minimize coupling between the two power supply domains. Another possibility, sometimes easier to implement in terms of PCB layout, is to consider the MCP3561/2/4 as an analog component, and therefore, connect AVDD to DVDD and AGND to DGND with a star connection. In this scheme, the decoupling capacitors may be larger, due to the ripple on the digital power supply (caused by the digital filters and the SPI interface of the MCP3561/2/4) now causing glitches on the analog power supply. Figure 7-6 shows an example of a power supply schematic with separate DVDD and AVDD. A high-current LDO (MCP1825) was used for the DVDD line to be able to power the MCU and other peripherals attached to the MCU. A high PSRR LDO (MCP1754) is used for the AVDD that goes to the ADC and a few other components sensitive to noise. The NET tie is used to separate DGND from AGND. FIGURE 7-5: Separating Digital and Analog Ground by Using a Star Connection. FIGURE 7-6: Power Supply with Separate Lines for Analog and Digital Sections (the “Net Tie” Object Represents the Star Ground Connection). VA VD MCU “Star” Point IA ID ID IA AVDD DVDD AGND D GND D-= A-= 0.1 F MCP356 0.1 F C GND GND GND GND +5V USB GNDA +9V IN Power Jack 2.5 mm 2 3 1 J10 MRA4005 D1 9V 0.1 μF 0603 C11 0.1 μF 0603 C10 GND 3.3A 3.3D GNDA GNDA 0.1 μF 0603 C12 MCP1754-3.3V VOUT 3 VIN 1 U3 GND LM1117-5V VIN 3 VOUT 2 U4 MCP1825S-3.3V VOUT 3 VIN 1 U2 5V GND Net Tie GND GNDA 10 μF TANT-B C15 10 μF TANT-B C44 10 μF TANT-B C13 10 μF TANT-B C45 GND J9 5V_USB 0.1 μF 0603 C14 GNDA |
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