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MCP3564-E/ST 数据表(PDF) 56 Page - Microchip Technology |
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MCP3564-E/ST 数据表(HTML) 56 Page - Microchip Technology |
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56 / 108 page ![]() MCP3561/2/4 DS20006181C-page 56 2019-2021 Microchip Technology Inc. 5.14.5 DELAY BETWEEN SCAN CYCLES (TIMER[23:0]) During Continuous mode, scan cycles are processed continuously, one after another, separated by a Time Delay (TTIMER_SCAN), which is defined by the TIMER register (address: 0x8) value. During this delay, the ADC is automatically placed into a power-saving mode (Standby or ADC Shutdown). The TTIMER_SCAN delay offers better power efficiency for applications which run a scan sequence periodically. Since the delay can be very long, it allows synchronous applications with very slow update rates without having to use an external timer. The TIMER register defines the time, TTIMER_SCAN, between cycles with a 24-bit unsigned value going from 0 to 16777215 DMCLK periods. Table 5-16 details the TIMER values with respect to the TIMER[23:0] code. The internal TIMER counter will decrement from the TTIMER_SCAN value to 0 and launch the new scan cycle. If the TTIMER_SCAN value is greater than TADC_SETUP (256 DMCLK periods), the device will enter ADC Shutdown mode (ADC_MODE is set to ‘00’ internally) at each end of a scan cycle. When the internal TIMER counter reaches 256, the device will start the ADC during a TADC_SETUP time to be ready to convert when the internal counter reaches 0. If the TTIMER_SCAN value is less than TADC_SETUP, the part will be placed in Standby mode between scan cycles (ADC_MODE is set to ‘10’ internally). ADC_MODE[1:0] bits in the CONFIG0 register can only be read as ‘11’ by the SPI interface during the entire scan cycle and between scan cycles. 5.15 A/D Conversions’ Automatic Reset and Restart Feature When the A/D conversions are running, the user can change the device configuration through the SPI inter- face by writing any register. Some register settings directly impact the conversion results and lead to invalid ADC data if they are changed within a conver- sion. The device incorporates an automatic Reset and restart feature for the A/D conversions to avoid these invalid data. Some register writes with the SPI interface during a conversion will automatically reset and restart the A/D conversion with the new settings. The automatic Reset and restart feature behavior depends on the register bits that are written by the SPI interface. 5.15.1 REGISTER BITS’ MODIFICATIONS NOT CAUSING RESET/RESTART The first group of bits will not generate any Reset and restart. This group is composed of all the unused bits, all the read-only bits and some digital settings, such as CONV_MODE[1:0], DATA_FORMAT[1:0], CRC_FORMAT, EN_CRCCOM, IRQ_MODE[0], EN_FASTCMD, EN_STP and LOCK[7:0] bits. 5.15.2 REGISTER BITS’ MODIFICATIONS CAUSING IMMEDIATE RESET/RESTART The second group of bits generates a Reset and a restart. The Reset is immediate, the restart is only valid after a period of two MCLK periods (necessary to handle the Reset and ensures that the restart is synchronous with the master clock). This group is composed of settings that do not induce an analog operating point change. This group includes: ADC_MODE[1:0], PRE[1:0], OSR[3:0], GAIN[2:0], AZ_MUX, EN_OFFCAL, EN_GAINCAL, IRQ_MODE[1:0], MUX[7:0] and DLY[2:0] bits. The EN_OFFCAL, EN_GAINCAL and IRQ_MODE[1:0] bits generate the Reset and restart only if they are changed to a new value. An overwrite of the same value has no effect. In SCAN mode, the Reset and restart feature will just restart the current conversion for this group of bits; the scan cycle is not modified and not restarted. The MUX[7:0] bits can be changed within SCAN mode with- out generating a Reset and a restart since this register is a Don’t Care during SCAN mode. The DLY[2:0] bits can be changed during the MUX mode without gener- ating a Reset and restart since these bits are Don’t Care during the MUX mode. The OFFSETCAL[23:0] and GAINCAL[23:0] only generate a Reset and a restart when written if their corresponding enable bit (EN_OFFCAL, EN_GAINCAL) is enabled. The ADC_MODE[1:0] bits generate an immediate Reset and restart but only if they are overwritten with ‘11’ (in any other case, the conversions are stopped). Depending on the part being in MUX or SCAN mode, the Reset and restart feature will reset the conversion or the complete scan cycle. TABLE 5-16: TIMER DELAY VALUE BETWEEN SCAN CYCLES TIMER[23:0] TTIMER_SCAN Delay Value (DMCLK Periods) 111111111111111111111111 16777215 111111111111111111111110 16777214 100000000000000000000000 8388608 000000000000000000000001 1 000000000000000000000000 0 |
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