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ADP5065ACBZ-1-R7 数据表(PDF) 35 Page - Analog Devices |
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ADP5065ACBZ-1-R7 数据表(HTML) 35 Page - Analog Devices |
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35 / 40 page ![]() Data Sheet ADP5065 Rev. D | Page 35 of 40 POWER DISSIPATION AND THERMAL CONSIDERATIONS The ADP5065 is a highly efficient USB compliant charger. However, if the device operates at high ambient temperatures and maximum current charging and loading conditions, the junction temperature can reach the maximum allowable operating limit (125°C). When the temperature exceeds 140°C, the ADP5065 turns off allowing the device to cool down. When the die temperature falls below 110°C and the TSD 140°C fault bit in Register 0x0D is cleared by an I2C write, the ADP5065 resumes normal operation. This section provides guidelines to calculate the power dissi- pated in the device and ensure that the ADP5065 operates below the maximum allowable junction temperature. The output power of the ADP5065 charger is gived by POUT = VISO_S × ILOAD + VISO_B × ICHG (1) where: POUT is the total output power to the system and battery. VISO_S is the ISO_Sx pin voltage. ILOAD is the load current from ISO_Sx node. VISO_B is the battery voltage. ICHG is the charge current. The efficiency of the ADP5065 is given by 100% × = IN OUT P P η (2) where: η is the efficiency. PIN is the input power. Power loss is given by PLOSS = PIN − POUT (3a) or PLOSS = POUT (1− η)/η (3b) Power dissipation can be calculated in several ways. The most intuitive and practical is to measure the power dissipated at the input and both outputs (ISO_Sx and ISO_Bx). Perform the mea- surements at the worst-case conditions (voltages, currents, and temperature). The difference between input and output power is dissipated in the device and the inductor. Use Equation 5 to derive the power lost in the inductor and, from this, use Equation 4 to calculate the power dissipation in the ADP5065 charger. A second method to estimate the power dissipation uses the system voltage and charging efficiency curves provided for the ADP5065. When the efficiency is known, use Equation 3b to derive the total power lost in the dc-to-dc converter, isolation FET and inductor; use Equation 5 to derive the power lost in the inductor, and then calculate the power dissipation in the buck converter using Equation 4. Note that the ADP5065 efficiency curves are typical values and may not be provided for all possible combinations of VIN, VOUT, and IOUT. To account for these variations, it is necessary to include a safety margin when calculating the power dissipated in the charger. CHARGER POWER DISSIPATION The power loss of the step-down charger is approximated by PLOSS = PDCHG + PL (4) where: PDCHG is the power dissipation of the ADP5065 charger. PL is the inductor power losses. The inductor losses are external to the device, and they do not have any effect on the die temperature. Equation 5 estimates the inductor losses without core losses. Some inductor manufacturers provide web tools to estimate power inductor core losses based on inductor type, switching frequency, and ripple current. At a switching frequency of 3 MHz, the core losses can add inductor losses significantly. PL ≈ IOUT(RMS)2 × DCRL (5) where: DCRL is the inductor series resistance. IOUT(RMS) is the summary of rms load current and charging current (ILOAD(RMS) + ICHG). 12 + 1 ) ( r I I OUT RMS OUT × = (6) where r is the normalized inductor ripple current. r = VOUT × (1 − D)/(IOUT × L × fSW) (7) where: L is the inductance. fSW is the switching frequency. D is the duty cycle. D = VOUT/VIN (8) |
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