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ADP5065ACBZ-1-R7 数据表(PDF) 18 Page - Analog Devices |
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ADP5065ACBZ-1-R7 数据表(HTML) 18 Page - Analog Devices |
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18 / 40 page ![]() ADP5065 Data Sheet Rev. D | Page 18 of 40 Weak Charge Mode (Constant Current) When the battery voltage exceeds VTRK_DEAD but is less than VWEAK, the charger switches to the intermediate charge mode. During the weak charge mode, the battery voltage is too low to allow the full system to power-up. Due to the low level of the battery, the USB transceiver cannot be powered and, therefore, cannot enumerate for more current from a USB host. Consequently, the USB limit remains at 100 mA. The system microcontroller may or may not be powered by the charger output voltage (VISO_SFC) depending upon the amount of current required by the microcontroller and/or the system architecture. In this case, the battery charge current (ICHG_WEAK) cannot be increased above 20 mA to ensure the microcontroller can still operate (if doing so) nor increased above the 100 mA USB limit. Thus, set the battery charging current as follows: • Set the default 20 mA via the linear trickle charger branch (to ensure that the microprocessor remains alive if powered by the main switching charger output, ISO_Sx). Any residual current on the main switching charger output, ISO_Sx, is used to charge the battery at up to the preprogrammed level in the I2C for ICHG (fast charge current limit) or ILIM (input current limit). • During weak current mode, other features may prevent the actual programmed weak charging current from reaching its full programmed value. Isothermal charging mode or input current limiting for USB compatibility may affect the programmed weak charging current value under certain operating conditions. During weak charging, the ISO_Sx node is regulated to VISO_SFC by the battery isolation FET. Fast Charge Mode (Constant Current) When the battery voltage exceeds VTRK_DEAD and VWEAK, the charger switches to fast charge mode, charging the battery with the constant current, ICHG. During fast charge mode (constant current), the CHARGER_STATUS register is set. During constant current mode, other features may prevent the current, ICHG, from reaching its full programmed value. Isothermal charging mode or input current limiting for USB compatibility may affect the value of ICHG under certain oper- ating conditions. The voltage on ISO_Sx is regulated to stay at VISO_SFC by the battery isolation FET when VISO_B < VISO_SFC. Fast Charge Mode (Constant Voltage) As the battery charges, its voltage rises and approaches the termi- nation voltage, VTRM. The ADP5065 charger monitors the voltage on the BAT_SNS pin to determine when charging should end. However, the internal ESR of the battery pack combined with PCB and other parasitic series resistances creates a voltage drop between the sense point at the BAT_SNS pin and the cell terminal itself. To compensate for this and ensure a fully charged cell, the ADP5065 enters a constant voltage charging mode when the termination voltage is detected on the BAT_SNS pin. The ADP5065 reduces charge current gradually as the cell continues to charge, maintaining a voltage of VTRM on the BAT_SNS pin. During fast charge mode (constant voltage), the CHARGER_ STATUS register is set. Fast Charge Mode Timer The duration of fast charge mode is monitored to ensure that the battery is charging correctly. If the fast charge mode runs for longer than tCHG without the voltage at the BAT_SNS pin reaching VTRM, a fault condition is assumed and charging stops. The fault condition is asserted on the CHARGER_STATUS reg- ister allowing the user to initiate the fault recovery procedure specified in the Fault Recovery section. If the fast charge mode runs for longer than tCHG, and VTRM has been reached on the BAT_SNS pin but the charge current has not yet fallen below IEND, charging stops. No fault condition is asserted in this circumstance and charging resumes as normal if the recharge threshold is breached. Watchdog Timer The ADP5065 charger features a programmable watchdog timer function to ensure charging is under the control of the processor. The watchdog timer starts running when the ADP5065 charger determines that the processor should be operational, that is, when the processor sets the RESET_WD bit for the first time or when the battery voltage is greater than the weak battery threshold, VWEAK. When the watchdog timer has been triggered, it must be reset regularly within the watchdog timer period, tWD. If the watchdog timer expires without being reset while in charger mode, the ADP5065 charger assumes there is a software problem and triggers the safety timer, tSAFE. For more infor- mation see the Safety Timer section. |
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