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ADP5065ACBZ-1-R7 数据表(PDF) 5 Page - Analog Devices

部件名 ADP5065ACBZ-1-R7
功能描述  Fast Charge Battery Manager with Power Path and USB Compatibility
PDF  40 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP5065ACBZ-1-R7 数据表(HTML) 5 Page - Analog Devices

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Data Sheet
ADP5065
Rev. D | Page 5 of 40
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
BATTERY DETECTION
Sink Current
ISINK
13
20
34
mA
Source Current
ISOURCE
7
10
13
mA
Battery Threshold
Low
VBATL
1.8
1.9
2.0
V
High
VBATH
3.4
V
No Battery Threshold
VNOBAT
3.3
V
VTRM ≥ 3.7 V, valid after charge complete (see
Figure 38)
3.0
V
VTRM < 3.7 V, valid after charge complete (see
Figure 38)
Battery Detection Timer
tBATOK
333
ms
TIMERS
Start Charging Delay Timer
tSTART
1
sec
Trickle Charge Timer
tTRK
60
min
Fast Charge Timer
tCHG
600
min
Charge Complete Timer
tEND
7.5
min
VBAT_SNS = VTRM, ICHG < IEND
Deglitch Timer
tDG
31
ms
Applies to VTRK, VRCH, IEND, VDEAD, VVIN_OK
Watchdog Timer1
tWD
32
sec
Safety Timer
tSAFE
36
40
44
min
Battery Node Short Timer1
tBAT_SHR
30
sec
LOGIC INPUTS
Maximum Voltage on Digital Inputs
VDIN_MAX
5.5
V
Maximum Logic Low Input Voltage
VIL
0.5
V
Applies to SCL, SDA, TRK_EXT, IIN_EXT
Minimum Logic High Input Voltage
VIH
1.2
V
Applies to SCL, SDA, TRK_EXT, IIN_EXT
Pull-Down Resistance
215
350
610
kΩ
Applies to TRK_EXT, IIN_EXT
1
These values are programmable via I2C. Values are given with default register values.
2
The output current during charging can be limited by IBUS or by the isothermal charging mode.
3
Programmable via external resistor programming, if required.
4
JEITA can be enabled or disabled in I2C.
RECOMMENDED INPUT AND OUTPUT CAPACITANCE
Table 2.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
CAPACITANCE
VINx Capacitance
1.0
µF
Effective capacitance
CFILT Pin Total External Capacitance
2.0
4.7
5.0
μF
Effective capacitance
ISO_Sx Pin Total Capacitance
10
50
µF
Effective capacitance
ISO_Bx Pin Total Capacitance
10
µF
Effective capacitance



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