PCF85363ATLSLASHA datasheet(22/86 Pages) NXP

22 / 86 page

NXP Semiconductors

PCF85363A

Tiny Real-Time Clock/calendar with 64 byte RAM, alarm function, battery switch-over time stamp input,

and I2C-bus

increments to match the alarm setting or as a permanently active signal which follows the

condition of bit A1F and/or A2F. See Section 7.9 for interrupt control.

A1F and A2F remain set until cleared by command. Once an alarm flag has been

cleared, it will only be set again when the time increments to match the alarm condition

once more.

When an interrupt pin is configured to pulse mode and if an alarm flag is not cleared and

the time increments to match the alarm condition again, then a repeated interrupt pulse

will be generated.

7.5 WatchDog

Bit

Symbol

Value

Description

WatchDog mode

0[1]

single shot

WDM

repeat mode

WatchDog register bits

0h[1] to 1Fh

Write: WatchDog counter load value

6 to 2

WDR[4:0]

0h to 1Fh

Read: current counter value

WatchDog step size (source clock)

00[1]

4 seconds (0.25 Hz)

1 second (1 Hz)

1⁄4 second (4 Hz)

1 to 0

WDS[1:0]

1⁄16 second (16 Hz)

Table 16. WatchDog - WatchDog control and register (address 2Dh) bit description

[1]

Default value.

7.5.1 WatchDog functions

The WatchDog has four selectable step sizes allowing for periods in the range from 62.5

ms to 124 seconds. For periods greater than 2 minutes, the alarm function can be used.

Delay

WDS[1:0] WatchDog step

size [1]

Minimum WatchDog duration

WDR = 1

Maximum WatchDog duration

WDR = 31

4 s

124 s

1 s

31 s

1⁄4 s

0.25 s

7.75 s

1⁄16 s

0.0625 s

1.9375 s

Table 17. WatchDog durations

[1]

Time periods can be affected by correction pulses.

PCF85363A

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3.1 — 18 June 2021

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