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PCF85363ATL/A 数据表(PDF) 45 Page - NXP Semiconductors |
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PCF85363ATL/A 数据表(HTML) 45 Page - NXP Semiconductors |
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45 / 86 page ![]() NXP Semiconductors PCF85363A Tiny Real-Time Clock/calendar with 64 byte RAM, alarm function, battery switch-over time stamp input, and I2C-bus [2] Default value. Setting the CLKPM bit disables the CLK output and force the pin to drive out a logic 0. Clearing this bit enables the pad to output the selected clock frequency (see bits COF[2:0] in the Function register, see Table 50). 7.12.2 TSPULL: TS pin pull-up resistor value Bit Symbol Value Description TS pin pull-up resistor value 0[1] 80 kΩ 6 TSPULL 1 40 kΩ Table 44. TSPULL bit - Pin_IO control register (address 27h) [1] Default value. Controls the pull-up resistor value used in the mechanical switch detector. For applications where there is a large capacitance on the TS pin e.g. from a long connecting cable to the mechanical switch, the pull-up resistor value can be halved to improve switch detection. Using the low-resistance value increases current consumption when the switch is closed i.e. shorting to VSS. 7.12.3 TSL: TS pin level sense Bit Symbol Value Description TS pin input sense 0[1] active HIGH 5 TSL 1 active LOW Table 45. TSL bit - Pin_IO control register (address 27h) [1] Default value. The active state of the TS pin can be defined for use as a timestamp trigger and/or as stop control for the time counting. Active HIGH implies a transition from logic 0 to logic 1 is active. Active LOW implies a transition from logic 1 to logic 0 is active. 7.12.4 TSPM[1:0]: TS pin I/O control Bit Symbol Value Description TS pin IO mode 00[1] disabled; input can be left floating 01 INTB output; push-pull 10 CLK output; push-pull 3 to 2 TSPM[1:0] 11 input mode Table 46. TSPM[1:0] bits - Pin_IO control register (address 27h) [1] Default value. PCF85363A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 3.1 — 18 June 2021 45 / 86 |
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