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PCF85363ATL/A 数据表(PDF) 61 Page - NXP Semiconductors |
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PCF85363ATL/A 数据表(HTML) 61 Page - NXP Semiconductors |
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61 / 86 page ![]() NXP Semiconductors PCF85363A Tiny Real-Time Clock/calendar with 64 byte RAM, alarm function, battery switch-over time stamp input, and I2C-bus The RTC must be configured correctly for this mode of operation. Outlined in Table 65 are the settings needed for this mode. In addition, the time must be set and any other configurations like battery switch-over, quartz oscillator driving mode, etc., which are dependent on the application. The sampler circuit shown in Figure 34 will hold invalid data until the mechanical switch detector mode is enabled. It then requires a minimum of one sample period to initialize to the current TS pin level. It is recommended to enable the mechanical detector mode on the TS pin at least 62.5 ms before enabling the TS event mode. Failure to do so can result in a false first event. Register Section Bit(s) State Comment Pin_IO Section 7.12 TSPM[1:0] 11 TS pin in input mode Pin_IO Section 7.12 TSIM 1 select mechanical switch mode Pin_IO Section 7.12 TSL 1 TS pin input is active LOW STOPM 1 allow TS pin to control STOP TSRIEA 1 allow timestamps to create interrupts Function Section 7.13 ILPA 0 generate interrupt pulses TSR_mode Section 7.12 TSR2M[2:0] 101 last event mode for timestamp2 Pin_IO Section 7.12 INTAPM[1:0] 10 output interrupt on INTA Table 65. Application configuration Figure 35 shows the waveforms that can be expected. sample clock, vdd_int and stop are internal nodes. vdd_int is supply which operates the IC and will be either VDD or VBAT, depending on the state of the battery switch-over. sample clock, 16 Hz t2 t4 t6 t3 TS pin switch SW 1 stop running stopwatch TSR2 INTA open open closed stopped running TSR2 = t4 TS pin sampled vdd_int floating VSS t5 aaa-010561 t1 Figure 35. Application example timing • At and before t1, SW1 is open (TS pin floating). The TS pin is sampled and the internal pull-up resistor will pull the pin HIGH to vdd_int. No actions are taken by the IC. • At t2, SW1 is still open. No action is taken by the IC. PCF85363A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 3.1 — 18 June 2021 61 / 86 |
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