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PCF85363ATL/A 数据表(PDF) 56 Page - NXP Semiconductors |
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PCF85363ATL/A 数据表(HTML) 56 Page - NXP Semiconductors |
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56 / 86 page ![]() NXP Semiconductors PCF85363A Tiny Real-Time Clock/calendar with 64 byte RAM, alarm function, battery switch-over time stamp input, and I2C-bus aaa-010477 OSCILLATOR OSCILLATOR STOP DETECTOR setting the OS flag div 4 32768 Hz 8192 Hz stop(1) PRESCALER RESET 0 1 100 Hz tick 1 Hz tick CPR 1. stop is a combination of STOP register bit and the TS pin when programmed for stop control. Figure 30. CPR and STOP bit functional diagram The stop signal blocks the 8.192 kHz clock from generating system clocks and freezes the time. In this state, the prescaler can be cleared with the CPR command in the Resets register (Section 7.15). Remark: The output of clock frequencies is not affected. The time circuits can then be set and do not increment until the STOP bit is released. The stop acts on the 8.192 kHz signal. And because the I2C-bus or TS pin input is asynchronous to the crystal oscillator, the accuracy of restarting the time circuits is between zero and one 8.192 kHz cycle (see Figure 31). aaa-004417 0 µs to 122 µs 8192 Hz stop released Figure 31. STOP release timing The first increment of the time circuits is between 0 s and 122 μs after STOP is released. The flow for accurately setting the time in RTC mode is: • start an I2C access at register 2Eh • set STOP bit • send CPR instruction • address counter rolls over to address 00h • set time (100th seconds, seconds to years) • end I2C access • wait for external time reference to indicate that time counting should start • start an I2C access at register 2Eh • clear STOP bit (time starts counting from now) • end I2C access The flow for resetting time in stop-watch mode is: • start an I2C access at register 2Eh • set STOP bit • send CPR instruction PCF85363A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 3.1 — 18 June 2021 56 / 86 |
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