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ES9219C 数据表(PDF) 41 Page - ESS Technology,Inc |
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ES9219C 数据表(HTML) 41 Page - ESS Technology,Inc |
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41 / 67 page ![]() ES9219 Datasheet CONFIDENTIAL ADVANCE INFORMATION 1.0.4 February 27, 2020 41 ESS TECHNOLOGY, INC. 237 South Hillview Drive, Milpitas, CA 95035, USA Tel (408) 643-8800 • Fax (408) 643-8801 Register 13: THD BYPASS & MONO_MODE I2C Slave Access: I2S Sync Slave Access: Clock Domain: Bits [7] [6] [5] [4] [3:0] Mnemonic RESERVED BYPASS_THD RESERVED MONO_MODE RESERVED Bits Mnemonic Description [7] RESERVED NA [6] BYPASS_THD Selects whether to disable the THD compensation logic. THD compensation is disabled by default and can be configured to correct for second and third harmonic distortion. 1’b0: Enable THD compensation. 1’b1: Disable THD compensation (default). [5] RESERVED NA [4] MONO_MODE Selects whether mono mode is enabled. Mono mode disables the channel 2 datapath and routes the channel 1 output to both DAC_L and DAC_R. This mode will consume less power as nearly half of the datapath is disabled. 1’b0: Disable mono mode (default). 1’b1: Enable mono mode. [3:0] RESERVED NA Register 14: SOFT START CONFIGURATION I2C Slave Access: I2S Sync Slave Access: Clock Domain: Bits [7] [6] [5] [4:0] Mnemonic SOFT_START RESERVED SOFT_START_TYPE SOFT_START_TIME Bits Mnemonic Description [7] SOFT_START Allows a register override for the soft start/stop ramp circuitry when in dig_override mode. 1’b0: Ramps the output to ground (soft stop) when the dig_override bit is enabled (default). 1’b1: Ramps the output to AVCC/2, which allows the DAC to produce an output. Only functions when the dig_override bit is enabled. [6] RESERVED NA [5] SOFT_START_TYPE Sets whether the soft start ramp is linear or a quadratic function. 1’b0: Uses the standard soft start ramp. 1’b1: Uses a quadratic function for the soft start ramp. [4:0] SOFT_START_TIME Sets the amount of time that it takes to perform a soft start ramp. This time affects both ramp to ground and ramp to AVCC/2. This value is valid from 0 to 20 (inclusive). ���������������� (����) = 4096 ∗ 2 (������������������������������������ ���������������� +1) ���������������� (��������) Register 15-16: VOLUME CONTROL I2C Slave Access: I2S Sync Slave Access: Clock Domain: Bits [15:8] [7:0] Mnemonic VOLUME_1 VOLUME_2 Bits Mnemonic Description [15:8] VOLUME_1 Default of 8’d80 (-40dB). |
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