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ES9219C 数据表(PDF) 45 Page - ESS Technology,Inc |
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ES9219C 数据表(HTML) 45 Page - ESS Technology,Inc |
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45 / 67 page  ES9219 Datasheet CONFIDENTIAL ADVANCE INFORMATION 1.0.4 February 27, 2020 45 ESS TECHNOLOGY, INC. 237 South Hillview Drive, Milpitas, CA 95035, USA Tel (408) 643-8800 • Fax (408) 643-8801 Register 32: AMPLIFIER CONFIGURATION I2C Slave Access: I2S Sync Slave Access: Clock Domain: Bits [7] [6:5] [4:3] [2] Mnemonic AMP_PDB_SS RESERVED AMP_MODE_GPIO RESERVED Bits Mnemonic Description [7] AMP_PDB_SS Powers the amplifier down when the DAC ramps to ground. Useful for powering down the amplifier when using automute 1’b0: Amplifier shutdown is controlled by the amp_mode (default) 1’b1: Shuts down the amplifier when the DAC is ramped to ground. [7:5] RESERVED NA [4:3] AMP_MODE_GPIO Configures the amplifier mode based on inputs from gpio1 and gpio2 3’d0: Core on (default). 3’d1: LowFi. 2’d2: HiFi 1V. 3’d3: HiFi 2V. Note: GPIO1 or GPIO2 must be high and gpio1_cfg or gpio2_cfg must be configured to Amp Mode Select (4’d11) for this to be selected for amp_mode [2:0] RESERVED NA Register 33: INTERRUPT MASK I2C Slave Access: I2S Sync Slave Access: Clock Domain: Bits [7] [6] [5] [4] [3] [2] [1] [0] Mnemoni c OCR_SD_MAS K OCL_SD_MAS K OCR_MAS K OCR_MAS K OCL_MAS K OCL_MAS K AUTOMUTE_MAS K LOCK_MAS K Bits Mnemonic Description [7] OCR_SD_MASK Masks the overcurrent shutdown bits from flagging an interrupt. [6] OCL_SD_MASK Masks the overcurrent shutdown bits from flagging an interrupt. [5] OCR_MASK Masks the right channel p/n overcurrent bits from flagging an interrupt. [4] OCR_MASK Masks the right channel p/n overcurrent bits from flagging an interrupt. [3] OCL_MASK Masks the left channel p/n overcurrent bits from flagging an interrupt. [2] OCL_MASK Masks the left channel p/n overcurrent bits from flagging an interrupt. [1] AUTOMUTE_MASK Masks the automute bit from flagging an interrupt. [0] LOCK_MASK Masks the lock status bit from flagging an interrupt. Register 34-37: PROGRAMMABLE NCO I2C Slave Access: I2S Sync Slave Access: Clock Domain: Bits [31:0] Mnemonic NCO_NUM Bits Mnemonic Description [31:0] NCO_NUM An unsigned 32-bit quantity that provides the ratio between MCLK and DATA_CLK. This value can be used to generate arbitrary DATA_CLK frequencies in master mode. A value of 0 disables this operating mode. |
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