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ES9219C 数据表(PDF) 59 Page - ESS Technology,Inc |
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ES9219C 数据表(HTML) 59 Page - ESS Technology,Inc |
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59 / 67 page  ES9219 Datasheet CONFIDENTIAL ADVANCE INFORMATION 1.0.4 February 27, 2020 59 ESS TECHNOLOGY, INC. 237 South Hillview Drive, Milpitas, CA 95035, USA Tel (408) 643-8800 • Fax (408) 643-8801 Synchronous I2C Interface (0x94 or 0x96) These registers are write only. Register 192: SOFT_RESET I2C Slave Access: I2S Sync Slave Access: Clock Domain: Bits [7:1] [0] Mnemonic RESERVED AO_SOFT_RESET Bits Mnemonic Description [7:1] RESERVED NA [0] AO_SOFT_RESET Software configurable hardware reset with the ability to reset the design to its initial power-on configuration. 1’b0: normal operation (default) 1’b1: resets the Sabre to its power-on defaults Note: This register will always read as “1’b0” as the power-on default for this register is “1’b0”. A reset can be verified by checking the status of other modified registers. Register 193: PLL CONFIG1 I2C Slave Access: I2S Sync Slave Access: Clock Domain: Bits [7] [6] [5] [4:0] Mnemonic PLL_CP_PDB PLL_VCO_PDB RESERVED PLL_VCO_BIAS_SEL Bits Mnemonic Description [7] PLL_CP_PDB Enables/disables the PLL charge pump. 1’b0: Disabled (default) 1’b0: Enabled Enable BEFORE PLL_VCO_PDB [6] PLL_VCO_PDB Enables/disables the PLL voltage-controlled oscillator (VCO). 1’b0: Disabled (default) 1’b0: Enabled Enable AFTER PLL_CP_PDB [5] RESERVED NA [4:0] PLL_VCO_BIAS_SEL Sets the VCO output and op-amp bias currents. VCO V2I Op-Amp Bias Current: 5’b000xx: Vtune/45kΩ (default) 5’b001xx: Vtune/40kΩ 5’b010xx: Vtune/35kΩ 5’b011xx: Vtune/30kΩ 5’b100xx: Vtune/80kΩ 5’b101xx: Vtune/70kΩ 5’b110xx: Vtune/60kΩ 5’b111xx: Vtune/50kΩ VCO V2I Output Current: 5’bxxx00: 2.0uA (default) 5’bxxx01: 1.5uA 5’bxxx10: 1.0uA 5’bxxx11: 0.5uA |
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