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ES9219C 数据表(PDF) 48 Page - ESS Technology,Inc

部件名 ES9219C
功能描述  32-bit Stereo Low Power DAC with Headphone Amplifier, Analog Volume Control, and Output Switch
PDF  67 Pages
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制造商  ESS [ESS Technology,Inc]
网页  http://www.esstech.com
标志 ESS - ESS Technology,Inc

ES9219C 数据表(HTML) 48 Page - ESS Technology,Inc

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ES9219 Datasheet
February 27, 2020
CONFIDENTIAL ADVANCE INFORMATION 1.0.4
ESS TECHNOLOGY, INC. 237 South Hillview Drive, Milpitas, CA 95035, USA Tel (408) 643-8800 • Fax (408) 643-8801
48
1’b1: Disable the internal digital power supply generator.
[1]
SHTOUTb
Disengages the shunt on the output of the amplifier.
1’b0: Shunt on the output of the amplifier is engaged, allowing for protection against clicks while configuring the
amplifier (default).
1’b1: Shunt on the output of the amplifier is disengaged, allowing the amplifier to drive an audio signal.
[0]
SHTINb
Disngages the shunt on the input of the amplifier.
1’b0: Shunt on the input of the amplifier is engaged, allowing for protection against clicks while configuring the
amplifier (default).
1’b1: Shunt on the input of the amplifier is disengaged.
Register 47: ANALOG CONTROL OVERRIDE 3
I2C Slave Access:
I2S Sync Slave Access:
Clock Domain:
Bits
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
Mnemonic
ENFCB
ENCP_OE
ENAUX_OE
CPL_ENS
CPL_ENW
SEL3V3_PS
ENSM_PS
SEL3V3_CPH
Bits
Mnemonic
Description
[7]
ENFCB
Enables the fast charge of the analog reference.
1’b0: The analog reference will be charged as quickly as possible (default).
1’b1: The analog reference will be charged at a slower rate.
[6]
ENCP_OE
Allows the digital core to override the charge pump settings.
1’b0: The charge pump settings are controlled via the GPIO2 pin (default).
1’b1: The charge pump settings are controlled via the digital override bits.
[5]
ENAUX_OE
Allows the digital core to override the output switch settings.
1’b0: The output switch is controlled via the GPIO2 pin (default).
1’b1: The output switch is controlled via the enaux register.
[4]
CPL_ENS
Enables the small charge pump and places it into strong mode. The small charge pump powers the pre-amplifier of
the headphone amp.
1’b0: The small charge pump (strong mode) is disabled (default).
1’b1: The small charge pump (strong mode) is enabled.
Note: encp_oe must be set to 1’b1 for the digital core to control the charge pump.
[3]
CPL_ENW
Enables the small charge pump and places it into weak mode. The small charge pump powers the pre-amplifier of
the headphone amp.
1’b0: The small charge pump (weak mode) is disabled (default).
1’b1: The small charge pump (weak mode) is enabled.
Note: encp_oe must be set to 1’b1 for the digital core to control the charge pump.
[2]
SEL3V3_PS
Configures the voltage of the positive power supply of the output stage.
1’b0: Uses 1.8V for the positive power supply of the output stage (default).
1’b1: Uses 3.3V for the positive power supply of the output stage.
[1]
ENSM_PS
Allows for a smooth transition between 1.8V and 3.3V on the positive power supply. This bit should be configured
to 1’b0 immediately before changing the sel3v3_ps bit.
Once sel3v3_ps has been set to the required value, then ensm_ps can be set back to 1’b1 for normal operation.
1’b0: Configure the positive supply for a transition between 1.8V and 3.3V (default).
1’b1: Normal operation.
[0]
SEL3V3_CPH
Configures the voltage of the negative power supply of the output stage.
1’b0: Uses 1.8V for the negative power supply of the output stage (default).
1’b1: Uses 3.3V for the negative power supply of the output stage.
Register 48: ANALOG CONTROL SIGNALS
I2C Slave Access:
I2S Sync Slave Access:
Clock Domain:



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