UCS2113 datasheet(37/62 Pages) MICROCHIP

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DS20005680B-page 37

UCS2113

INTERRUPT STATUS 2 REGISTER (ADDRESS 04H)

R/W-0

R/C-0

R-0

R/C-0

U-0

R/C-0

ERR2

DISCH_ERR2

VS_LOW

KEEP_OUT2

TSD_LOW

—

BACK_V2

OV_LIM2

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit

C = Clear on Read

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

ERR2: Error Port 2 - Indicates that an error was detected on the VBUS1 pin and the device has entered

the Error state. Writing this bit to a ‘0’ will clear the Error state and allows the device to be returned to

the Active state. When written to ‘0’, all error conditions are checked. If all error conditions have been

removed, the UCS2113 returns to the Active state. This bit is set automatically by the UCS2113 when

the Error state is entered. If any other bit is set in the Interrupt Status register (04h), the device will not

leave the Error state. This bit is cleared automatically by the UCS2113 if the auto-recovery fault handling

functionality is active and no error conditions are detected. Likewise, this bit is cleared when the

PWR_EN2 control is disabled (Note 1).

1 = Port 2 in Error State

0 = Port 2 in Active State (no errors detected)

bit 6

DISCH_ERR2: Discharge Error Port 2 - Indicates the device was unable to discharge Port2. This bit will

be cleared when read if the error condition has been removed or if the ERR bit is cleared. This bit will

cause the ALERT#2 pin to be asserted and the device to enter the Error state.

1 = Device was unable to Discharge VBUS2

0 = No VBUS2 discharge error

bit 5

VS_LOW: Indicates that the VS voltage has fallen below the VS_UVLO threshold and both VBUS1 and

VBUS2 port power switches are held off. This bit is cleared automatically when the VS voltage is above

the VS_UVLO threshold.

1 =VS voltage has fallen below the VS_UVLO

0 =VS voltage is above VS_UVLO

bit 4

KEEP_OUT2: Port 2 Minimum Keep-out region - Indicates that the V-I output on the VBUS2 pin has

dropped below VBUS_MIN. This bit will be cleared when read if the error condition has been removed or

if the ERR2 bit is cleared. This bit will cause the ALERT#2 pin to be asserted and the device to enter the

Error state.

1 =VBUS2 < VBUS_MIN

0 =VBUS2 > VBUS_MIN

bit 3

TSD_LOW: Indicates that the die temperature has exceeded the TTSD_LOW threshold and it is still above

the TTSD_LOW - TTSD_LOW_HYST. This bit is cleared automatically when the die temperature is below

the TTSD_LOW -TTSD_LOW_HYST. This bit will not cause the corresponding ALERT#1 and/or

ALERT#2 pins to be asserted and ERR1 and/or ERR2 bits to be set unless:

• a power switch operates in constant current mode

• PWR_EN1 and/or PWR_EN2 controls transition from inactive to active

• it is a power up situation and PWR_EN1 and/or PWR_EN2 pins are active.

1 = Internal die temperature has exceeded TTSD_LOW

0 = Internal die temperature has not exceeded TTSD_LOW

bit 2

Unimplemented: Read as '0'

bit 1

BACK_V2: Back-Bias Voltage Port 2 - Indicates that the VBUS2 voltage has exceeded the VS or VDD

voltages by more than 150 mV. This bit will be cleared when read if the error condition has been removed

or if the ERR2 bit is cleared. This bit will cause the ALERT#2 pin to be asserted and the device to enter

the Error state.

1 =VBUS2 > VS, or VBUS2 > VDD by more than 150 mV

0 =VBUS2 voltage has not exceeded the VS and VDD voltages by more than 150 mV

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