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STM8S103F2 数据表(PDF) 64 Page - STMicroelectronics |
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STM8S103F2 数据表(HTML) 64 Page - STMicroelectronics |
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64 / 121 page ![]() Electrical characteristics STM8S103F2 STM8S103F3 STM8S103K3 64/121 DocID15441 Rev 14 10.3.3 External clock sources and timing characteristics HSE user external clock Subject to general operating conditions for VDD and TA. Figure 18. HSE external clock source Table 32. HSE user external clock characteristics Symbol Parameter Conditions Min Max Unit fHSE_ext User external clock source frequency -0 16 MHz VHSEH(1) 1. Guaranteed by characterization results. OSCIN input pin high level voltage - 0.7 x VDD VDD + 0.3 V V VHSEL(1) OSCIN input pin low level voltage -VSS 0.3 x VDD ILEAK_HSE OSCIN input leakage current VSS < VIN < VDD -1 +1 µA |
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